Codasip will be demonstrating its new L110 core alongside Codasip Studio Fusion at #61DAC. Codasip L110 delivers up to 50% improvements in performance per watt and 20% smaller code size compared to similar cores in the market. The core offers extensive configurability, allowing different area/performance trade-off levels,… Read More
Tag: codasip
Webinar: Fine-grained Memory Protection to Prevent RISC-V Cyber Attacks
Most organizations are aware of cybercrime attempts such as phishing, installing malware from dodgy websites or ransomware attacks and undertake countermeasures. However, relatively little attention has been given to memory safety vulnerabilities such as buffer overflows or over-reads. For decades, the industry has created… Read More
Podcast EP163: The Unique Advantages of the Codasip Custom Compute Architecture With Mike Eftimakis
Dan is joined by Mike Eftimakis. Mike has an extensive background in the electronics industry with almost 30 years in senior technical and business roles. After innovating with companies like VLSI, NewLogic or Arm, he is now VP Strategy and Ecosystem at Codasip, where he drives the long-term vision and its day-to-day implementation.… Read More
CEO Interview: Ron Black of Codasip
Dr. Black has over 30 years of industry experience. Before joining Codasip, he has been President and CEO at Imagination Technologies and previously CEO at Rambus, MobiWire (SAGEM Handsets), UPEK, and Wavecom. He holds a BS and MS in Engineering and a Ph.D. in Materials science from Cornell University. A consistent thread of his… Read More
Re-configuring RISC-V Post-Silicon
How do you reconfigure system characteristics? The answer to that question is well established – through software. Make the underlying hardware general enough and use platform software to update behaviors and tweak hardware configuration registers. This simple fact drove the explosion of embedded processors everywhere … Read More
Scaling is Failing with Moore’s Law and Dennard
Looking backward and forward, the white paper from Codasip “Scaling is Failing” by Roddy Urquhart provides an interesting history of processor development since the early 1970s to the present. However it doesn’t stop there and continues to extrapolate what the chip industry has in store for the rest of this decade. For the last… Read More
Optimizing AI/ML Operations at the Edge
AI/ML functions are moving to the edge to save power and reduce latency. This enables local processing without the overhead of transmitting large volumes of data over power hungry and slow communication links to servers in the cloud. Of course, the cloud offers high performance and capacity for processing the workloads. Yet, … Read More
Podcast EP60: Knowing your bugs can make a big difference to elevate the quality of verification
Dan is joined by Philippe Luc, director of verification at Codasip. Philippe has spent over 20 years in verification which includes an extensive and successful career at Arm. Philippe gained engineering experience with a list of significant achievements during his time there, including:
– Design and verification… Read More
Codasip and Coby and Czech
At ARM TechCon I ran into Coby Hanoch who has just been appointed VP worldwide sales of a comany that I’d not previously heard of called Codasip. As the name implies they supply code, and ASIPs. Well, actually IP source code and ASIP tools. The company is based in Brno (pronounced pretty much like Bruno) in the Czech republic … Read More