The topic of chiplets is getting a lot of attention these days. The chiplet movement has picked up more momentum since Moore’s law started slowing down as process technology approached 5nm. With the development cost of a monolithic SoC crossing the $500M and wafer yields of large die-based chips dropping steeply, the decision … Read More
Discussions of chiplets has been on the rise, ever since the slowdown of Moore’s law benefits. Gartner Research projects semiconductor revenue from systems using chiplets to grow from $3.3 billion in 2020, to $50.5 billion in 2024. With any market opportunity, there are always challenges to overcome in order to realize the full… Read More
My first exposure to seeing multiple die inside of a single package in order to get greater storage was way back in 1978 at Intel, when they combined two 4K bit DRAM die in one package, creating an 8K DRAM chip, called the 2109. Even Apple used two 16K bit DRAM chips from Mostek to form a 32K bit DRAM, included in the Apple III computer, circa… Read More
One of the career Intel employees (33+ years) that Pat Gelsinger brought back is Stuart Pann. Stuart is now the Senior Vice President of the Intel Corporate Planning Group. He does not have direct foundry experience but he certainly knows Intel and Pat so it will be interesting to see where this goes.
Stuart recently penned an article… Read More
A couple of weeks ago, I blogged on GlobalFoundries’ silicon technologies supporting automotive radar applications. This time it is on GlobalFoundries’ silicon photonics technology which expects to find adoption in a broad spectrum of applications. The blog is based on listening to a technology presentation made by Dr. … Read More
Last week, Cadence hosted its annual CadenceLIVE Americas 2021 conference. Four keynotes and eighty-three different talks on various topics were presented. The talks were delivered by Cadence, its customers and partners.
One of the keynotes was from Partha Ranganathan, VP and Engineering Fellow from Google. His talk was titled,… Read More
Dan is joined by Krishna Settaluri, Co founder and CEO of Blue Cheetah. Krishna received his Ph.D. in electrical engineering from UC Berkeley and masters and bachelors from MIT specializing in design automation of high-speed silicon photonic links using analog generator technology. Krishna has worked at Apple, Google, Caltech… Read More
Over the recent years, the volume and velocity of discussions relating to chiplets have intensified. A major reason for this is the projected market opportunity. According to research firm Omdia, chiplets driven market is expected to be $6B by 2024 from just $645M in 2018. That’s an impressive nine-fold projected increase over… Read More
Dan and Mike are joined by Sudhir Mallya, vice president of corporate and product marketing at OpenFive. We explore 2.5D design and the role chiplets play. Current technical and business challenges are discussed as well as an assessment of how the chiplet market will develop and what impact it will have.
The views, thoughts, and
Earlier in April, Achronix made a product announcement with the headline “Achronix Now Shipping Industry’s Highest Performance Speedster7t FPGA Devices.” The press release drew attention to the fact that the 7nm Speedster®7t AC7t1500 FPGAs have started shipping to customers ahead of schedule. In the complex product world… Read More
