Podcast EP312: Approaches to Advance the Use of Non-Volatile Embedded Memory with Dave Eggleston

Podcast EP312: Approaches to Advance the Use of Non-Volatile Embedded Memory with Dave Eggleston
by Daniel Nenni on 10-22-2025 at 8:00 am

Daniel is joined by Dave Eggleston is senior business development manager at Microchip with a focus on licensing SST SuperFlash technology. Dave’s extensive background in Flash, MRAM, RRAM, and storage is built on 30+ years of industry experience. This includes serving as VP of Embedded Memory at GLOBALFOUNDRIES, CEO… Read More


Exploring TSMC’s OIP Ecosystem Benefits

Exploring TSMC’s OIP Ecosystem Benefits
by Daniel Nenni on 10-10-2025 at 6:00 am

TSMC Booth

Now that the dust has settled let’s talk more about TSMC’s Open Innovation Platform. Launched in 2008, OIP represents a groundbreaking collaborative model in the semiconductor industry. Unlike IDMs that controlled the entire supply chain, OIP fosters an “open horizontal” ecosystem uniting TSMC… Read More


Revolutionizing AI Infrastructure: Alchip and Ayar Labs’ Co-Packaged Optics Breakthrough at TSMC OIP 2025

Revolutionizing AI Infrastructure: Alchip and Ayar Labs’ Co-Packaged Optics Breakthrough at TSMC OIP 2025
by Daniel Nenni on 10-01-2025 at 6:00 am

Alchip TSMC OIP 2025

In the relentless race to power next-generation artificial intelligence (AI) systems, data connectivity has emerged as the critical bottleneck. As AI models balloon in size—from billions to trillions of parameters—compute resources alone are insufficient. According to Ayar Labs, approximately 70% of AI compute time is … Read More


Advancing Semiconductor Design: Intel’s Foveros 2.5D Packaging Technology

Advancing Semiconductor Design: Intel’s Foveros 2.5D Packaging Technology
by Admin on 09-15-2025 at 10:00 am

Intel Foundry Packaging Evolution 2025

In the rapidly evolving landscape of semiconductor manufacturing, the demand for processors that handle increasing workloads while maintaining power efficiency and compact form factors has never been higher. Intel’s Foveros 2.5D packaging technology emerges as a pivotal innovation, enabling denser die integration… Read More


eBook on Mastering AI Chip Complexity: Pathways to First-Pass Silicon Success

eBook on Mastering AI Chip Complexity: Pathways to First-Pass Silicon Success
by Admin on 09-01-2025 at 8:00 am

MArtering AI Chip Complexity Synopsys

The rapid evolution of artificial intelligence (AI) is transforming industries, from autonomous vehicles to data centers, demanding unprecedented computational power and efficiency. As highlighted in Synopsys’ guide, the global AI chip market is projected to reach $383 billion by 2032, growing at a 38% CAGR. This … Read More


Chiplets: providing commercially valuable patent protection for modular products

Chiplets: providing commercially valuable patent protection for modular products
by Robbie Berryman on 08-24-2025 at 6:00 am

Screenshot 2025 07 27 at 08 32 09

Many products are assembled from components manufactured and distributed separately, and it is important to consider how such products are manufactured when seeking to provide commercially valuable patent protection. This article provides an example in the field of computer chip manufacture.

Chiplets

A system-on-a-chip

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Chiplets and Cadence at #62DAC

Chiplets and Cadence at #62DAC
by Daniel Payne on 08-12-2025 at 10:00 am

SoC Cockpit Concept min

Using chiplets is an emerging trend well-covered at #62DAC and they even had a dedicated Chiplet Pavilion, so I checked out the presentation from Dan Slocombe, Design Engineering Architect in the Compute Solutions Group at Cadence. In a short 20 minutes Dan managed to cover a lot of ground, so this blog will summarize the key  points.… Read More


CoPoS is a Bigger Canvas for Chiplets and HBM

CoPoS is a Bigger Canvas for Chiplets and HBM
by Admin on 08-03-2025 at 10:00 am

Chip on Panel on Substrate, often shortened to CoPoS, extends the familiar idea of chip on carrier packaging by moving the redistribution and interposer style structures from circular wafers to large rectangular panels. The finished panel assembly is then mounted on an organic or glass package substrate. This shift from round

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AI-Driven Chip Design: Navigating the Future

AI-Driven Chip Design: Navigating the Future
by Admin on 08-02-2025 at 1:00 pm

DAC 62 Systems on Chips

On July 9, 2025, a DACtv session by Dr. Peter Levin explored the transformative impact of artificial intelligence (AI) on chip design, as presented in the YouTube video. The speaker, an industry expert, delved into how AI is reshaping electronic design automation (EDA), addressing the escalating complexity of modern chips and… Read More