Webinar: The Perfect Duo: Chiplet Design Meets Modern Data & IP Management

Webinar: The Perfect Duo: Chiplet Design Meets Modern Data & IP Management
by Admin on 01-05-2024 at 4:33 pm

In a world where the chiplet market is projected to soar to $50.5 billion in revenue by 2024, staying ahead of the game is crucial. This monumental shift in the IC design ecosystem necessitates a forward-thinking approach to navigate the sea of data and intricate Intellectual Properties (IPs) securely.

That’s why Keysight… Read More


2024 Outlook with Matt Burns of Samtec

2024 Outlook with Matt Burns of Samtec
by Daniel Nenni on 01-04-2024 at 6:00 am

Matt Burns Samtec

Matt develops go-to-market strategies for Samtec’s Silicon to Silicon solutions. Over the course of 20+ years, he has been a leader in design, technical sales and marketing in the telecommunications, medical and electronic components industries. It has been an honor working with Matt and his team for the last 3 years and I value… Read More


ESDA Webinar: Chiplet Security – Current and Future

ESDA Webinar: Chiplet Security – Current and Future
by Admin on 12-06-2023 at 5:00 pm

Many semiconductor-based systems are moving toward 2.5D designs consisting of different pre-manufactured chips (chiplets) that perform specific functions. These are often provided by multiple vendors and are typically interconnected using an interposer. However, unlike monolithic multi-function chips, chiplets can… Read More


Prototyping Chiplets from the Desktop!

Prototyping Chiplets from the Desktop!
by Daniel Nenni on 12-05-2023 at 10:00 am

S2C PLM Mini

S2C has been successfully delivering rapid SoC prototyping solutions since 2003 with over 600 customers, including 6 of the world’s top 10 semiconductor companies. I personally have been involved with the prototyping market for a good part of my career and know S2C intimately.

S2C is the leading independent global supplier… Read More


CadenceCONNECT: The Race Is On!

CadenceCONNECT: The Race Is On!
by Admin on 11-07-2023 at 4:41 pm

Event Overview

Date: Monday, November 13, 2023

Time: 10:00am – 4:00pm, followed by an exclusive networking event

Location: Cadence Headquarters, San Jose, CA

There is an unprecedented demand for advanced-node chip design that pushes beyond traditional boundaries. Computing power, security, reliability, and other multifaceted

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Ensuring 3D IC Semiconductor Reliability: Challenges and Solutions for Successful Integration

Ensuring 3D IC Semiconductor Reliability: Challenges and Solutions for Successful Integration
by Kalar Rajendiran on 10-25-2023 at 10:00 am

3D IC Cross Section Illustration

One of the most promising advancements in the semiconductor field is the development of 3D Integrated Circuits (3D ICs). 3D ICs enable companies to partition semiconductor designs and seamlessly integrate silicon Intellectual Property (IP) at the most suitable process nodes and processes. This strategic partitioning yields… Read More


Intel Ushers a New Era of Advanced Packaging with Glass Substrates

Intel Ushers a New Era of Advanced Packaging with Glass Substrates
by Mike Gianfagna on 09-18-2023 at 10:00 am

Intel Ushers a New Era of Advanced Packaging with Glass Substrates


Intel recently issued a press announcement that has significant implications for the future of semiconductors.  The release announces Intel’s new glass substrate technology. The headline states: Glass substrates help overcome limitations of organic materials by enabling an order of magnitude improvement in design rulesRead More


Webinar: UCIe-Based Chiplet Verification – from IP to SoC

Webinar: UCIe-Based Chiplet Verification – from IP to SoC
by Admin on 09-15-2023 at 12:15 pm

About

Innovative die disaggregation technologies, enable a future where a catalog of chiplets will be available to mix and match based on the end application. The industry’s fastest emerging interconnect standard called Universal Chiplet Interconnect Express (UCIe) enables end users to combine chiplets with different functionality… Read More