Taming Physical Closure Below 16nm

Taming Physical Closure Below 16nm
by Bernard Murphy on 01-30-2023 at 6:00 am

NoC floorplan

Atiq Raza, well known in the semiconductor industry, has observed that “there will be no simple chips below 16nm”. By which he meant that only complex and therefore high value SoCs justify the costs of deep submicron design.  Getting to closure on PPA goals is getting harder for such designs, especially now at 7nm and 5nm. Place and… Read More


Podcast EP138: The Impact of Using a Physically Aware NoC with Charlie Janac

Podcast EP138: The Impact of Using a Physically Aware NoC with Charlie Janac
by Daniel Nenni on 01-20-2023 at 10:00 am

Dan is joined by Charlie Janac, president and CEO of Arteris IP. Charlie’s career spans 20 years in multiple industries, including design automation, semiconductor capital equipment, nanotechnology, industrial polymers, and venture capital.

Charlie discusses the benefits of using network-on-chip, or NoC IP on several… Read More


Podcast EP134: The Impact of Using a Physically Aware NoC with Charlie Janac

Podcast EP134: The Impact of Using a Physically Aware NoC with Charlie Janac
by Daniel Nenni on 01-20-2022 at 10:00 am

Dan is joined by Charlie Janac, president and CEO of Arteris IP. Charlie’s career spans 20 years in multiple industries, including design automation, semiconductor capital equipment, nanotechnology, industrial polymers, and venture capital.

Charlie discusses the benefits of using network-on-chip, or NoC IP on several… Read More


Podcast EP46: Arteris IP – the role and impact of system IP

Podcast EP46: Arteris IP – the role and impact of system IP
by Daniel Nenni on 11-05-2021 at 10:00 am

Dan is joined by industry veteran Charlie Janac, chairman, president and CEO of Arteris IP. Dan explores the various products that comprise system IP with Charlie, including the high growth markets he sees. Dan and Charlie also have an interesting discussion about autonomous driving – when and how it will likely be deployed… Read More


Arteris IP Contributes to Major MPSoC Text

Arteris IP Contributes to Major MPSoC Text
by Bernard Murphy on 04-28-2021 at 6:00 am

Wileybook min

You might have heard of the Multicore and Multiprocessor SoC (MPSoC) Forum sponsored by IEEE and other industry associations and companies. This group of top-notch academic and industry technical leaders gets together once a year to talk about hardware and software architecture and applications for multicore and multiprocessor… Read More


CEO Interview: Charlie Janac of Arteris IP

CEO Interview: Charlie Janac of Arteris IP
by Daniel Nenni on 08-28-2020 at 6:00 am

charlie janac


Charlie Janac is president and CEO of Arteris IP where he is responsible for growing and establishing a strong global presence for the company that is pioneering the concept of NoC technology. Charlie’s career spans over 20 years and multiple industries including electronic design automation, semiconductor capital equipment,… Read More


CTO Interview: Ty Garibay of ArterisIP

CTO Interview: Ty Garibay of ArterisIP
by Daniel Nenni on 09-06-2017 at 12:00 pm

ArterisIP has been a SemiWiki subscriber since the first year we went live. Thus far we have published 61 Arteris related blogs that have garnered close to 300,000 visits making Arteris and NoC one of our top attractions, absolutely.

One of the more newsworthy announcements this week is the addition of Ty Garibay to the Arteris executiveRead More


CEO Interview: Charlie Janac of Arteris

CEO Interview: Charlie Janac of Arteris
by Daniel Nenni on 10-17-2016 at 7:00 am

Charlie Janac ArterisIP

When Charlie Janac talks, people listen, absolutely. Charlie’s 30 year career spans EDA, IP, semiconductor equipment, nano-technology, and venture capital. For the last 11 years he has been CEO of interconnect IP provider Arteris who invented the industry’s first commercial network on chip (NoC) SoC interconnect IP… Read More