TSMC dilemma: Cadence, Mentor or Synopsys?

TSMC dilemma: Cadence, Mentor or Synopsys?
by Eric Esteve on 10-18-2012 at 4:49 am

Looking at the Press Release (PR) flow, it was interesting to see how TSMC has solved a communication dilemma. At first, let’s precise that #1 Silicon foundry has to work with each of the big three EDA companies. As a foundry, you don’t want to lose any customer, and then you support every major design flow. Choosing another strategy… Read More


Advanced Node Design Webinar Series

Advanced Node Design Webinar Series
by Daniel Nenni on 10-14-2012 at 8:15 pm


At advanced process nodes, variation and its effects on the design become a huge challenge. Join Cadence® Virtuoso® experts for a series of technical webinars on variation-aware design. Learn how to use advanced technologies and tools to analyze and understand the affects of variation. We’ll introduce you to the latest Virtuoso… Read More


Exclusive Sneak Peek: Cadence at TSMC OIP Ecosystem Forum 2012

Exclusive Sneak Peek: Cadence at TSMC OIP Ecosystem Forum 2012
by Daniel Nenni on 10-05-2012 at 8:37 am

The TSMC Open Innovation Platform® (OIP) Ecosystem Forum brings TSMC’s design ecosystem member companies together to share with our customers real-case solutions for customers’ design challenges and success stories of best practice in TSMC’s design ecosystem. More than 90% of the attendees last year said “this… Read More


So British! with Mike MULLER (ARM CTO & Founder) at SAME Conference

So British! with Mike MULLER (ARM CTO & Founder) at SAME Conference
by Eric Esteve on 10-04-2012 at 5:36 am

SAME conference has started with Joel Huloux, Chairman of the MIPI Alliance, who gave a high level introduction about MIPI, rather business than technology oriented, talking to Marketing/Management audience. Extracting the main points from his presentation:

  • More than 30 specifications have been issued (Important remark:
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SAME 2012 Conference on October 2-3 in Sophia is coming soon!

SAME 2012 Conference on October 2-3 in Sophia is coming soon!
by Eric Esteve on 09-24-2012 at 11:01 am

This is the 15[SUP]th[/SUP] anniversary for the SAME Conference, dedicated to innovation on Microelectronics. Sophia-Antipolis is not only close to Mediterranean sea, but also at the heart of Telecom valley in south of France, with Texas Instruments design center dedicated to Application Processor design (OMAP), Cadence… Read More


Cadence Mixed Signal Technology Summit

Cadence Mixed Signal Technology Summit
by Paul McLellan on 09-21-2012 at 6:46 pm

Yesterday I attended some of the Cadence mixed-signal technology summit. The day ended with a panel session on Are We Closing the Gap Yet in Mixed-signal Design? Richard Goering moderated. The panelists were all mixed signal experts:

  • Nayaz Khan of Maxim
  • Nishant Shah of Broadcom
  • Shiv Sikand of IC Manage
  • Bill Meier of Texas Instruments
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Cadence September News: strong IP and VIP focus

Cadence September News: strong IP and VIP focus
by Eric Esteve on 09-14-2012 at 4:25 am

There are three articles on the front page, in the September release of Cadence newsletter, all of them are dedicated to either IP (DDR4), VIP (NVM express VIP being used at Samsung) or Martin Lund. You can read Martin’s interview here and/or take a look at what I write about him this summer. This strong focus on IP, and in fact on Interface… Read More


17th Si2 Conference – October 9 – Santa Clara, CA

17th Si2 Conference – October 9 – Santa Clara, CA
by Daniel Nenni on 09-11-2012 at 8:30 am

This conference will begin with a keynote address by my good friend Jim Hogan, EDA industry pioneer and venture capitalist. Jim has worked in the semiconductor design and manufacturing industry for more than 35 years and is very candid about his experience and vision for the future of EDA. This keynote and Q&A alone is worth … Read More


A brief history of Interface IP, the 4th version of IPNEST Survey

A brief history of Interface IP, the 4th version of IPNEST Survey
by Eric Esteve on 09-07-2012 at 5:17 am

The industry is moving extremely fast to change the “old” way to interconnect devices using parallel bus, to the most efficient approach based on High Speed Serial Interconnect (HSSI) protocols. The use of HSSI has become the preferred solution compared with the use of parallel busses for new products developed … Read More


A Brief History of Cadence Design Systems

A Brief History of Cadence Design Systems
by Daniel Nenni on 09-01-2012 at 8:10 pm

EDA software for IC and system design became a commercial business in the early 1980s. In those days, 3 companies – Daisy Systems, Mentor Graphics, and Valid Logic Systems – dominated the emerging EDA industry. However, two small startups that emerged in the early 1980s grew rapidly and merged to form Cadence Design Systems in 1988.… Read More