EDA Flows for 3D Die Integration

EDA Flows for 3D Die Integration
by Tom Dillinger on 07-20-2021 at 6:00 am

future integration

Background

The emergence of 2.5D heterogeneous die integration using a silicon (or organic) interposer has enabled unique system architectures.  The term “More than Moore” has been used to describe the circuit density and cost advantages of leveraging multiple die in the package, the die potentially in different process technologies. … Read More


Podcast EP16: Hyperscale Computing & Changes in the Datacenter

Podcast EP16: Hyperscale Computing & Changes in the Datacenter
by Daniel Nenni on 04-16-2021 at 10:00 am

Dan is joined by Frank Schirrmeister, senior group director of solutions marketing at Cadence Design Systems, Frank has extensive experience in complex system design from his work at companies such as Cadence, Synopsys, Imperas and ChipVision. He has also advised Vayavya Labs and CriticalBlue.

Dan and Frank discuss the many… Read More


WEBINAR LESSONS LEARNED FROM SOLARWINDS

WEBINAR LESSONS LEARNED FROM SOLARWINDS
by Daniel Nenni on 04-15-2021 at 11:00 am

How to Limit the Scope & Damage of Software Supply Chain Attacks

Register for our webinar with Cadence Design Systems & a cybersecurity expert with over 30+ years of experience. Join us to learn about the SolarWinds attack and how to limit the scope of damage as a result of future software supply chain attacks by securing

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Webinar: Design Methodologies for Next-Generation Heterogeneously Integrated 2.5/3D-IC Designs

Webinar: Design Methodologies for Next-Generation Heterogeneously Integrated 2.5/3D-IC Designs
by Herb Reiter on 04-10-2020 at 6:00 am

2d 3d Semiconductor Packaging SemiWiki Cadence

I had the opportunity to preview the upcoming SemiWiki webinar titled: Design Methodologies for Next-Generation Heterogeneously Integrated 2.5/3D-IC Designs. John Park’s message, describing this powerful Cadence solution, really impressed me. That’s why I want to encourage you to register for it and join this SemiWiki … Read More


Ultra-Short Reach PHY IP Optimized for Advanced Packaging Technology

Ultra-Short Reach PHY IP Optimized for Advanced Packaging Technology
by Tom Dillinger on 12-18-2019 at 10:00 am

Frequent Semiwiki readers are no doubt familiar with the rapid advances in 2.5D heterogeneous multi-die packaging technology.  A relatively well-established product sector utilizing this technology is the 2.5D integration of logic die with a high-bandwidth memory (HBM) DRAM die stack on a silicon interposer;  the interposer… Read More


IP Provider Vidatronic Embraces the ClioSoft Design Management Platform

IP Provider Vidatronic Embraces the ClioSoft Design Management Platform
by Randy Smith on 07-31-2019 at 6:00 am

Having worked at several semiconductor intellectual property (SIP) companies, I know how important it is to have a strong design data management platform for tracking the development and distribution of SIP products. Everyone doing semiconductor design should care about design data management. But for an IP company, it is … Read More


1-on-1 with Anirudh Devgan, President, Cadence

1-on-1 with Anirudh Devgan, President, Cadence
by Tom Dillinger on 07-27-2018 at 12:00 pm

At the Design Automation Conference, no one is busier than an EDA company executive — conference panels, product launch briefings, customer meetings, and corporate dinners all place considerable demands on their time. I was fortunate enough to be able to meet with Anirudh Devgan, President of Cadence, at the recent DAC55 in San… Read More


IoT Designs Beginning to Shift to 7nm: Promises Upside for Cadence Physically-Aware Design Flow

IoT Designs Beginning to Shift to 7nm: Promises Upside for Cadence Physically-Aware Design Flow
by Mitch Heins on 01-29-2018 at 12:00 pm

Until recently, ICs at bleeding edge nodes like 7nm technology from foundries like TSMC were mostly targeted for high-performance-computing (HPC) and mobile applications or possibly high radix switches that needed the increased performance of advanced nodes. The momentum of Moore’s law and Moore-than-Moore saw foundries… Read More


Photonics Summit Delivers High-Bandwidth Discussion on State of Silicon Photonics

Photonics Summit Delivers High-Bandwidth Discussion on State of Silicon Photonics
by Mitch Heins on 10-03-2017 at 12:00 pm

On September 6, 2017, Cadence Design Systems, Lumerical Solutions and PhoeniX Software hosted their second Photonics Summit. As with last year’s summit, this was a two-day event, with the first day including in a myriad of photonics presentations and the second day being a hands-on workshop. The hands-on workshop taught attendees… Read More


CDNLive Boston Keynote Address Highlights Emergence of Silicon Photonics

CDNLive Boston Keynote Address Highlights Emergence of Silicon Photonics
by Mitch Heins on 09-27-2017 at 7:00 am

I had the pleasure of being able to attend the CDNLive event held in the Boston, MA area last month and I was pleasantly surprised to see that Cadence highlighted Silicon Photonics as one of its Keynote topics. MIT Professor Duane Boning gave an excellent overview of the current state of silicon photonics and why he believes it is time… Read More