Samsung recently held a meeting where they laid out a detailed roadmap for their foundry business. On Tuesday June 1st, Daniel Nenni and myself had an interview with Kelvin Low, senior director of foundry marketing and business development to discuss the details of Samsung’s plans.… Read More
Tag: 7nm
SPIE 2017 – imec papers and interview
At the SPIE Advanced Lithography Conference imec published a number of papers on EUV, multi-patterning and other lithography issues. In addition to seeing several of the papers presented I had a chance to sit down with imec’s director of advanced patterning, Greg McIntyre. In this article I will summarize my discussions… Read More
SPIE 2017 – ASML Interview and Presentations
At the SPIE Advanced Lithography conference I sat down with Mike Lercel, Director of Strategic Marketing for ASML for an update. ASML also presented several papers at the conference and I attended many of these. In this article, I will discuss my interview with Mike and summarize the ASML presentations.… Read More
14nm 16nm 10nm and 7nm – What we know now
Last week Intel held a manufacturing day where they revealed a lot of information about their 10nm process for the first time and information on competitor processes continues to slowly come out as well. I thought it would be useful to summarize what we know now, especially since some of what Intel announced was different than what… Read More
Intel Manufacturing Day: Nodes must die, but Moore’s Law lives!
Yesterday I attended Intel’s manufacturing day. This was the first manufacturing day Intel has held in three years and according to Intel their most in depth ever.
Nodes must die
I have written several articles comparing process technologies across the leading-edge logic producers – GLOBALFOUNDRIES, Intel, Samsung… Read More
TSMC Talks About 22nm, 12nm, and 7nm EUV!
The TSMC Symposium was jam-packed this year with both people and information. I had another 60 minutes of fame in the Solido booth where I signed 100 books, thank you to all who stopped by for a free book and a SemiWiki pen. SemiWiki bloggers Tom Dillinger and Tom Simon were also there so look for more TSMC Symposium blogs coming in the… Read More
SPIE 2017: EUV Readiness for High Volume Manufacturing
The SPIE Advanced Lithography Conference is the world’s leading conference addressing photolithography. This year on the opening day of the conference, Samsung and Intel presented papers summarizing the readiness of EUV for high volume manufacturing (HVM). In this article, I will begin by summarizing the EUV plans … Read More
Scott Jones ISS Talk – Moore’s Law Lives!
I was invited to give a talk at this year’s ISS conference, the talk seemed to be very well received and I was asked to blog about it for SemiWiki. Parts of the talk will be familiar to SemiWiki readers from some of my previous blogs but I also went into more detail around some scaling challenges. The following is a summary of what… Read More
ISS Gary Patton Keynote: FD-SOI, FinFETS, and Beyond!
Two weeks ago the SEMI ISS Conference was held at Half Moon Bay in California. On the opening day of the conference Gary Patton CTO of GLOBALFOUNDRIES gave the keynote address and I also had the chance to sit down with Gary for an interview the next day.
The 2017 Leading Edge Semiconductor Landscape
In early September of 2016 I published an article “The 2016 Leading Edge Semiconductor Landscape” that proved to be very popular with many views, comments and reposting’s. Since I wrote that article a lot of new data has become available enabling some projections to be replaced by actual values and new analysis… Read More