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TSMC Banner 2023 
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TSMC
Posted on by Paul McLellan

TSMC Goes To DAC

TSMC Goes To DAC
by Paul McLellan on 05-22-2013 at 5:37 pm
Categories: Foundries, TSMC

TSMC will be at DAC again this year, of course. The main event, as last year, is the OIP Theater where TSMC’s partners come and present their collaboration stories. Here is the schedule:
[TABLE] align=”left” class=”cms_table_grid” style=”width: 480px”
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | Time

| class=”cms_table_grid_td” | Monday

| class=”cms_table_grid_td” | Tuesday

| class=”cms_table_grid_td” | Wednesday

|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 09.45
| class=”cms_table_grid_td” | Analog Bits
| class=”cms_table_grid_td” | Uniquify
| class=”cms_table_grid_td” | Synopsys
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 10.00
| class=”cms_table_grid_td” | Solido
| class=”cms_table_grid_td” | Muneda
| class=”cms_table_grid_td” | IROCtech
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 10.15
| class=”cms_table_grid_td” | SST
| class=”cms_table_grid_td” | Helic
| class=”cms_table_grid_td” | Atoptech
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 10.30
| class=”cms_table_grid_td” | Integrand s/w
| class=”cms_table_grid_td” | TSMC
| class=”cms_table_grid_td” | Kilopass
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 10.45
| class=”cms_table_grid_td” | Raffle and break

| class=”cms_table_grid_td” | Raffle and break

| class=”cms_table_grid_td” | Raffle and break

|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 11.00
| class=”cms_table_grid_td” | Cadence
| class=”cms_table_grid_td” | Mentor
| class=”cms_table_grid_td” | Berkeley DA
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 11.15
| class=”cms_table_grid_td” | GUC
| class=”cms_table_grid_td” | Dorado DA
| class=”cms_table_grid_td” | Analog Bits
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 11.30
| class=”cms_table_grid_td” | ARM
| class=”cms_table_grid_td” | True Circuits
| class=”cms_table_grid_td” | Lorentz Solutions
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 11.45
| class=”cms_table_grid_td” | Apache DS
| class=”cms_table_grid_td” | IROCtech
| class=”cms_table_grid_td” | ARM
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 12.00
| class=”cms_table_grid_td” | Kilopass
| class=”cms_table_grid_td” | Atoptech
| class=”cms_table_grid_td” | TSMC
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 01.15
| class=”cms_table_grid_td” | Atrenta
| class=”cms_table_grid_td” | Berkely DA
| class=”cms_table_grid_td” | Cadence
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 01.30
| class=”cms_table_grid_td” | Muneda
| class=”cms_table_grid_td” | Kilopass
| class=”cms_table_grid_td” | Atrenta
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 01.45
| class=”cms_table_grid_td” | IROCtech
| class=”cms_table_grid_td” | Lorentz Solutions
| class=”cms_table_grid_td” | Synopsys
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 02.00
| class=”cms_table_grid_td” | Atoptech
| class=”cms_table_grid_td” | Integrand s/w
| class=”cms_table_grid_td” | Synopsy
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 02.15
| class=”cms_table_grid_td” | Raffle and break

| class=”cms_table_grid_td” | Raffle and break

| class=”cms_table_grid_td” | Raffle and break

|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 02.30
| class=”cms_table_grid_td” | Mentor
| class=”cms_table_grid_td” | Cadence
| class=”cms_table_grid_td” | Mentor
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 02.45
| class=”cms_table_grid_td” | True Circuits
| class=”cms_table_grid_td” | Solido
| class=”cms_table_grid_td” | Helic
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 03.00
| class=”cms_table_grid_td” | Uniquify
| class=”cms_table_grid_td” | Analog Bits
| class=”cms_table_grid_td” | Dorado DA
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 03.15
| class=”cms_table_grid_td” | Lorentz Solutions
| class=”cms_table_grid_td” | GUC
| class=”cms_table_grid_td” | Integrand s/w
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 03.30
| class=”cms_table_grid_td” | Dorado DA
| class=”cms_table_grid_td” | Apache DS
| class=”cms_table_grid_td” | Muneda
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 03.45
| class=”cms_table_grid_td” | Raffle and break

| class=”cms_table_grid_td” | Raffle and break

| class=”cms_table_grid_td” | Raffle and break

|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 04.00
| class=”cms_table_grid_td” | Berkeley DA
| class=”cms_table_grid_td” | ARM
| class=”cms_table_grid_td” | Uniquify
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 04.15
| class=”cms_table_grid_td” | Cadence
| class=”cms_table_grid_td” | Mentor
| class=”cms_table_grid_td” | True Circuits
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 04.30
| class=”cms_table_grid_td” | Synopsy
| class=”cms_table_grid_td” | Atrenta
| class=”cms_table_grid_td” | Solido
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 04.45
| class=”cms_table_grid_td” | Helic
| class=”cms_table_grid_td” | SST
| class=”cms_table_grid_td” | Apache DS
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 05.00
| class=”cms_table_grid_td” | TSMC
| class=”cms_table_grid_td” | TSMC
| class=”cms_table_grid_td” | GUC
|- class=”cms_table_grid_tr”
| class=”cms_table_grid_td” | 05.15
| class=”cms_table_grid_td” | Raffle

| class=”cms_table_grid_td” | Raffle

| class=”cms_table_grid_td” | Raffle

|-

TSMC people are also all over the show in various workshops, panels and presentations in partner’s booths.

Sunday

  • Sunday 1-5 IP Workshop: Driving Quality to the Desktop of the DAC Engineer (Dan K) Room 11AB

Monday

  • Monday 7.15-8.45 Optimizing Implementation of Performance and Power-balanced Processor Cores (breakfast panel including Willie Chen) Hilton Ballroom H
  • Monday 10.30-11 OIP Ecosystem and IP Quality(Dan K) in ChipEstimate booth
  • Monday 1.30-2.30 16FF and 20nm Certification (Willy Chen) in Cadence booth
  • Monday 2-3 Best Practices for 20nm DRC and Smartfill (YK Cheng) in Mentor suite #4
  • Monday 2.30-3 RTL Signoff is Finally Here (John M) in Atrenta booth

Tuesday

  • Tuesday 11.30-1.30 FinFETs: Challenges in Deployment (lunch panel including Suk Lee) in convention center level 4 EF
  • Tuesday 12.30-1 RTL Signoff is Finally Here (Lluis Paris) in Atrenta booth
  • Tuesday 3-3.30 Ecosystem Collaboration (Tom Quan) in Synopsys booth
  • Tuesday 3-4 Marrying More Than Moore (panel including Suk Lee) in Mentor booth
  • Tuesday 4-5 Cadence IP on leading TSMC Process Nodes (Lluis Paris) in Cadence booth
  • Tuesday 6-7.30 iPDKs: a Thriving PDK Standard(IPL DAC dinner, Tom Quan) Hilton ballroom G

Wednesday

  • Wednesday 1.30-2 RTL Signoff is Finally Here (Suk Lee) in Atrenta booth
  • Wednesday 2.50-3.30 IP Quality (Suk Lee) in ARM booth
  • Wednesday 5-6 Custom/AMS Design at Advanced Nodes (YK Cheng) in Cadence booth

Thursday

  • Thursday 1.30-2.30 Analog Design With FinFETs, the Gods Must Be Crazy (panel including Eric Soenen) Room 16AB

Full details on TSMC’s website here.

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