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UCIe InterOp Testchip Unleashes Growth of Open Chiplet Ecosystem

UCIe InterOp Testchip Unleashes Growth of Open Chiplet Ecosystem
by Kalar Rajendiran on 12-11-2023 at 6:00 am

Pike Creek UCIe Test chip

Intel recently made headlines when CEO Pat Gelsinger unveiled the world’s first UCIe interoperability test chip demo at Innovation 2023. The test chip built using advanced packaging technology is codenamed Pike Creek and is used to demonstrate interoperability across chiplets designed by Intel and Synopsys. More details … Read More


IEDM Buzz – Intel Previews New Vertical Transistor Scaling Innovation

IEDM Buzz – Intel Previews New Vertical Transistor Scaling Innovation
by Mike Gianfagna on 12-10-2023 at 2:00 pm

IEDM Buzz – Intel Previews New Vertical Transistor Scaling Innovation

For more than 65 years, the IEEE International Electron Devices Meeting (IEDM) has been the world’s pre-eminent forum for reporting technological breakthroughs in the areas of semiconductor and electronic device technology, design, manufacturing, physics, and modeling. As I post this, the conference is underway in San Francisco… Read More


Podcast EP197: A Tour of the RISC-V Movement and SiFive’s Contributions with Jack Kang

Podcast EP197: A Tour of the RISC-V Movement and SiFive’s Contributions with Jack Kang
by Daniel Nenni on 12-08-2023 at 10:00 am

Dan is joined by Jack Kang of SiFive. As a member of the founding team at SiFive, Jack oversees the Business Development, Customer Experience, and Corporate Marketing groups. He is responsible for strategic business initiatives and partnerships, technical pre-sales activities and post-sales support, and corporate messaging… Read More


CEO Interview: Suresh Sugumar of Mastiska AI

CEO Interview: Suresh Sugumar of Mastiska AI
by Daniel Nenni on 12-08-2023 at 6:00 am

profile image

Suresh is a technology executive with deep technical expertise in semiconductors, artificial intelligence, cybersecurity, internet-of-things, hardware, software, etc. He spent 20 years in the industry, most recently serving as an Executive Director for open-source zero-trust chip development at Technology Innovation… Read More


Analysis and Verification of Single Event Upset Mitigation

Analysis and Verification of Single Event Upset Mitigation
by Jacob Wiltgen on 12-07-2023 at 10:00 am

Figure 1 Driving trends

The evolution of space-based applications continues to drive innovation across government and private entities. The new demands for advanced capabilities and feature sets have a direct impact on the underlying hardware, driving companies to migrate to smaller geometries to deliver the required performance, area, and power… Read More


5G Aim at LEO Satellites Will Stimulate Growth and Competition

5G Aim at LEO Satellites Will Stimulate Growth and Competition
by Bernard Murphy on 12-07-2023 at 6:00 am

satellite min

Low earth orbit (LEO) satellites as an intermediary for communication became hot when Elon Musk announced Starlink (yeah, other options were available, but Elon Musk). This capability extends internet availability to remote areas and notably (for a while) to Ukraine in support of the war with Russia. Satellites can in principle… Read More


Do you have Time to Pull in your Tapeout Schedule?

Do you have Time to Pull in your Tapeout Schedule?
by Ronen Laviv on 12-06-2023 at 10:00 am

schedule pullin

So… , we’re 4 months before tapeout. You were assigned to close place & route on three complex key blocks. You have 15 machines for the job, 5 per block.

You send your first batch, 5 runs per block. You’re not very surprised that your first batch fails. You modify the scripts, and run another batch. And… (Surprise… Read More


Webinar: “Navigating our AI Wonderland” … with humans-in-the-Loop?

Webinar: “Navigating our AI Wonderland” … with humans-in-the-Loop?
by Richard Curtin on 12-06-2023 at 8:00 am

AIeverywhere EETimes

AI is here, there, and absolutely everywhere – now and forever.

The electronics industry, and the world at-large, have experienced an overwhelming amount of AI coverage this year, with no letup in store for 2024. Both EE Times and Silicon Catalyst have recently staged events around artificial intelligence:

  • AI Everywhere” delivered
Read More

BEOL Mask Reduction Using Spacer-Defined Vias and Cuts

BEOL Mask Reduction Using Spacer-Defined Vias and Cuts
by Fred Chen on 12-06-2023 at 6:00 am

BEOL Mask Reduction Using Spacer Defined Vias and Cuts

In recent advanced nodes, via and cut patterning have constituted a larger and larger portion of the overall BEOL mask count. The advent of SALELE [1,2] caused mask count to increase for EUV as well, resulting in costs no longer being competitive with DUV down to 3nm [3]. Further development by TEL [4] has shown the possibility for… Read More


Prototyping Chiplets from the Desktop!

Prototyping Chiplets from the Desktop!
by Daniel Nenni on 12-05-2023 at 10:00 am

S2C PLM Mini

S2C has been successfully delivering rapid SoC prototyping solutions since 2003 with over 600 customers, including 6 of the world’s top 10 semiconductor companies. I personally have been involved with the prototyping market for a good part of my career and know S2C intimately.

S2C is the leading independent global supplier… Read More