I’m keenly interested in SPICE circuit simulators, so at DACI met with John Piercefrom Cadence to get an update on what’s new this year.
John Pierce, Cadence
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Circuit Simulation update from Cadence at DAC
Enhancing Multi-Domain System Simulation with FMI Co-SimulationAs systems become increasingly complex across every field…Read More
Ceva Targets PC Gaming Audio Market With RealSpace Elevate for WindowsCeva has launched RealSpace™ Elevate for Windows, a…Read More
Applying QED to Hardware Accelerator Verification. Innovation in VerificationQED (Quick Error Detection) can be a powerful…Read More
When Software Outruns Silicon: Hardware-Assisted Test Generation to the RescueFor the past decade, the semiconductor industry has…Read More
MIPS Warrior Goes Into Battle
You are probably aware that Imagination Technologies, perhaps most well known for creating the GPU that is in the iPhone and iPad, acquired MIPS, which was originally a spinout from Silicon Graphics and licenses a line of general purpose microprocessors.
MIPS considers that they have a purer implementation of the RISC philosophy… Read More
Can China alone drive semiconductor growth?
Production of electronic equipment (including computers, communications, consumer, etc.) has been sluggish over the last year in all key regions of the world except China. The chart below shows three-month-average change versus a year ago for electronics production in local currency through April 2013 (May 2013 for China).… Read More
Kathryn Kranen: The Problem with EDA is…
Kathryn Kranen, CEO of Jasper Design Automation, got to give her view of the future of EDA on the Thursday of DAC. For many years she has been on the EDAC board and is currently chair. When she first was on the board she talked to many of the stakeholders in the EDA ecosystem: EDA companies, IP companies, semiconductor companies, academics,… Read More
Remember FPGA Memory
We must admit the excitement of the FinFETs and all that coupled with the enormous amount of DSPs and BRAMs in the FPGA world is very cool. They even have ARMs, and I highly recommend that they get Legs then they can run around and everything and fit in with the rest of us. Perhaps the Feds can grant them immigration status and they could… Read More
Visual AMS Debug, an update at DAC
If you’re involved with AMS or transistor-level IC design then having visual tools will help you design and debug quicker. At DAC I met with Gerhard Angst, President and Founder of Concept Engineering to get an update.
Gerhard Angst (center), Concept Engineering… Read More
Full Visibility in ASIC Prototypes at DAC
ASIC prototyping from multiple vendors using FPGA boards was popular at DAC again this year in Austin, Texas. I stopped by the Tektronix booth for a few minutes to meet with Dave Orecchio to get an update.
Dave Orecchio (right), Tektronix… Read More
Fujitsu, Mediatek, Richtek and Synopsys om Custom IC Design
Synopsys has been acquiring EDA and IP companies at a fast clip over the past few years and it’s often made me wonder how they are going to craft a coherent tool flow for custom IC design. At DACthis year I learned that for schematic capture the winning tool is Custom Designer SE– a relatively new tool, while the IC layout… Read More
Is Your Synchronizer Doing its Job (Part 2)?
In Part 1 of this topic I discussed what it takes to estimate the mean time between failures (MTBF) of a single stage synchronizer. Because supply voltages are decreasing and transistor thresholds have been pushed up to minimize leakage, the shortened MTBF of many synchronizer circuits at nanoscale process nodes is presenting… Read More
TSMC and Xilinx on the FinFAST Track!
The power of the fabless semiconductor ecosystem never ceases to amaze me. On one hand you have the Intel backed press crowing about Intel stealing Altera from TSMC. On the other hand you have Xilinx and TSMC crowing about a new ‘one-team’ approach. If you are interested in the real story you’ve come to the right place.
“Altera’s… Read More
Why Huawei Says It Will Match TSMC’s Most Advanced Chips by 2031