Operationalizing Secure Semiconductor Collaboration: Safely, Globally, and at ScaleSemiconductor manufacturing is among the most complex industrial…Read More
Keynote: On-Package Chiplet Innovations with UCIeIn the rapidly evolving landscape of semiconductor technology,…Read More
Things From Intel 10K That Make You Go …. HmmmmINTEL FORM 10-K ☑ ANNUAL REPORT PURSUANT TO…Read More
Global 2nm Supply Crunch: TSMC Leads as Intel 18A, Samsung, and Rapidus Race to CompeteThe semiconductor industry is in the midst of…Read More
Reducing Risk Early: Multi-Die Design Feasibility ExplorationThe semiconductor industry is entering a new era…Read More
Robert Veltman and Vikash Tyagi of SanDisk Corporation presented at SNUG a few weeks ago on their selection and use of RTDA’s NetworkComputer to manage their workflows.
Like everyone else, SanDisk has a high-performance computing farm (and like everyone else they are coy about how big it is) and lots of licenses for EDA tools,… Read More
This year for the first time the Thursday of DAC is tranining day. So that would be June 6th in Austin, of course. There are four tracks of training focused on SystemC, ARM Cortex and two on SystemVerilog, all areas of increasing use in SoC design, especially in mobile.
Each track of training is divided into two parts, one held from 9am… Read More
I talked to Greg Peterschmidt of Agilent today about their integration of Advanced Design System (ADS) with ClioSoft’s SOS Design Data Management that was announced today. The integrated product is known as SOS viaADS. Greg is the ADS Product Planning Manager.
ADS is the market leader for design of very high frequency stuff… Read More
It was definitely a good idea to go to Munich to listen to the keynote talk from Lip-Bu Tan. Did I learned in direct live the name of the next acquisition from Cadence in 2013, after Tensilica and Cosmic Circuits? Yes and the winner is… Evatronix! And cadence as well as Evatronix is enjoying more than 600 customers worldwide, thanks … Read More
Join us for a free career-building panel at DAC 2013, sponsored by Women in Electronic Design.
· Don’t go it alone! How many times have you heard it?
A lively panel of luminaries discuss how alliances are critical to our success, and cover networking and negotiating skills for achieving personal satisfaction and professional visibility.… Read More
Atrenta are at booth 1847 in the exhibit hall where there will be regular presentations in the “RTL Signoff Theater” and lots of presentations on various aspects of SpyGlass, GenSys and BugScope in their suites. The registration page for the suite sessions is here. Just who is presenting in the RTL Signoff Theater … Read More
There’s a one-person EDA start-up called iSchematics.com that offers schematic capture and cloud-based simulation for both web browsers and mobile devices like the iPhone and iPad that is being sued. I’ve blogged about their EDA tools before:
… Read More
Storage interfaces for mobile are evolving rapidly, in particular with the Universal Flash Storage (UFS) standard. So how do you test a design? If you want to test a design that accesses, say, an SD card then you can wander into Fry’s and buy an SD card for a few dollars. But to design an interface to UFS is a bit harder since the … Read More
So you want to know how reliable your chips are and how susceptible they are to single event effects (SEEs) where a neutron or an alpha particle causes a storage element (flop or memory cell) to flip in a way that alters the behavior of the device. There are two ways a particle hitting a device might not cause a problem. Firstly, the particle… Read More
Your corporate training will teach you there is no such thing as stereo types and they are bad, naughty. We all know they are true; it’s just some companies now of days try to force the worker bees to do a flash erase and drop your brain at the door. I never participated in that and as you can imagine it went very well. Dilbert is true…
I am … Read More
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Things From Intel 10K That Make You Go …. Hmmmm