TSMC Describes Technology Innovation Beyond A14The inaugural event for the 2025 TSMC Technology…Read More
SNUG 2025: A Watershed Moment for EDA - Part 2At this year’s SNUG (Synopsys Users Group) conference,…Read More
Feeding the Beast: The Real Cost of Speculative Execution in AI Data CentersFor decades, speculative execution was a brilliant solution…Read More
LLMs Raise Game in Assertion Gen. Innovation in VerificationLLMs are already simplifying assertion generation but still…Read More
Automotive Functional Safety (FuSa) ChallengesModern vehicles have become quite sophisticated, like a…Read More
Can’t make it to Santa Clara? Join us online!
The detailed 2013 CPTF agenda is now up in preparation for the February 5th event at the Santa Clara Convention Center. This is one of the rare times that you can get a free lunch! Watch this quick video to see what is in store for us this year. Dr. Paul McLellan and I will be there so please… Read More
ASIC design service companies are an essential piece of the SC ecosystem, as well as Silicon Foundries, EDA and IP vendors. Their customers range from pure fabless with no ASIC design resources, who need a third party to turn a concept into a real product (IC) and then market and sale it, to large IDM temporarily lacking design resource… Read More
What is the biggest challenge facing an EDA startup today? By a startup, I mean a brand new company, not a company that already has a few customers and is either on a fast path to success or a slower path whereby the company can continue to grow slowly forever.
Obviously, one challenge is the funding environment. Since EDA acquisitions… Read More
Engineers have this fascination with how things work. They are thrilled to tear stuff apart, and sometimes to even be able to put it back together afterwords. So I can keep my recovering engineer card, I thought I’d take a few moments and look inside a technology Daniel Payne and I have been covering here, exploring where the idea started… Read More
Embedded memories have an important impact on power. SoCs that integrate multiple functions on a single silicon die are at the heart of many electronic devices. As process geometries have scaled, design teams have used more and more of the additional silicon real estate available to integrate embedded memories that serve as scratch-pads,… Read More
Oasys has joined the TSMC Soft-IP Alliance Program. This means that TSMC IP partners have access to a new RTL exploration tool to improve QoR and reduce the iterations needed for design closure. In modern process nodes, RTL engineers implementing complex IP cores for graphics, networking, and mobile computing are struggling … Read More
I spent some quality time with Subi Kengeri, Vice President, Technology Architecture, Office of the CTO, GLOBALFOUNDRIES in Las Vegas during CES. Great guy, he worked at Silicon Access, Virage and TSMC before GF. One thing you should know about embedded memory guys, SRAM is the first thing that goes through a new process so they … Read More
My oldest son just upgraded Smart Phones from a 3″ display to a 4.5″ display and was shocked to discover that his battery barely lasted 8 hours, so I welcomed him to the reality of limited battery life in modern SoC-based mobile devices. There is some hope in increasing battery life for our consumer-oriented devices … Read More
Going to DAC? I just booked my plane ticket last weekend since flights from the Bay Area to wherever DAC is are so often overbooked. It’s in Austin this year in case you’ve been living under a rock. There are lots of reasons to go, from the academic conference to the world’s biggest EDA exhibition. And here is one … Read More
Jasper is presenting at both ends of the world at both ends of February.
First in Israel, it is SemiIsrael Verification Day 2013 on February 5th (next Tuesday) at Green House in Tel Aviv.
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