Ceva Unleashes Wi-Fi 7 Pulse: Awakening Instant AI Brains in IoT and Physical RobotsIn the rapidly evolving landscape of connected devices,…Read More
Adding Expertise to GenAI: An Insightful Study on Fine-TuningI wrote earlier about how deep expertise, say…Read More
EDA Has a Value Capture Problem — An Outsider’s ViewBy Liyue Yan (lyan1@bu.edu) Fact 1: In the…Read More
WEBINAR: How PCIe Multistream Architecture is Enabling AI ConnectivityIn the race to power ever-larger AI models,…Read More
A Six-Minute Journey to Secure Chip Design with CaspiaHardware-level chip security has become an important topic…Read More
One of the questions that Calypto is asked all the time is what is the difference between sequential logical equivalence checking (SLEC) and logical equivalence checking (LEC).
LEC is the type of equivalence checking that has been around for 20 years, although like all EDA technologies gradually getting more powerful. LEC is … Read More
As I see the semiconductor industry going through significant changes and advances, yet ironically plagued by a growing perception that the pace of scaling is slowing, I was inclined to take a peek into what the industry experts say about the state of the industry and the future of Moore’s Law. Fortunately, at last week’s International… Read More
2013 was an up year for the stock markets as both the DJIA and the tech-heavy NASDAQ showed significant growth, so how did EDA and Semi IP companies do in the past 12 months? A quick stock plot from Yahoo Finance shows us that only two of the seven companies beat the NASDAQ: ARMH, MENT.… Read More
Global semiconductor manufacturing equipment sales have increased each of the last three quarters after dropping significantly in the second half of 2012, based on data from Semiconductor Equipment and Materials International (SEMI) and Semiconductor Equipment Association of Japan (SEAJ). Much of the volatility is in sales… Read More
I first read about the Pebble smartwatch earlier this year and thought “I don’t need yet another electronic device, and certainly not one that’s attached to my body.” Then I felt bad. Am I a troglodyte? It’s true, I do still have an iPhone 4, which is a little embarrassing in Silicon Valley. I have also never worn a wrist watch of any kind,… Read More
I spend about an hour a day reading blogs from EDA companies, foundries, independent bloggers and of course, SemiWiki. Richard Goering at Cadence assembled a top 10 list of the most popular blogs posted on their site in 2013, revealing that engineers were most interested in: FinFETs, 20nm and smaller nodes, memory technology and… Read More
The first keynote at the Burlingame 3D conference was by Doug Yu of TSMC. Not surprisingly he was talking about 3D. In particular, TSMC has WLSI technology that they call CoWoS, which stands for chip-on-wafer-on-substrate which pretty much describes how it is built. This is the technology that Xilinx uses for its recently announced… Read More
We have posted several blogs related to Cadence IP strategy, or I should say new strategy. Each of these blogs was dealing with a particular product, like PCI Express gen-3 Controller IP, latest DDR4 Memory Controller or Wide I/O. This approach was equivalent to describe trees, one after one, and finally ignoring the forest! It’s… Read More
It was a dinner with more than a thousand semiconductor professionals from around the world keynoted by Author and Editor in Chief of Forbes Magazine Steve Forbes. What more could a humble blogger ask for? Even at $250 a plate it was well worth it just to mingle amongst the people who make this industry so great.
Global Semiconductor… Read More
Yes, it is that time of year again, DAC is coming and it is in San Francisco so you can bet we will break attendance records, absolutely. I would like to call on ALL semiconductor IP companies to exhibit this year. IP is the center of the semiconductor design universe, DAC is the premier semiconductor design event, and San Francisco … Read More
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AI RTL Generation versus AI RTL Verification