Non Volatile Memory (NVM) is a superb technology, at least if you appreciate the physical law behind: storing a data in an embedded location with no physical link, as you charge a cell by influence and read it without physically accessing the stored data. Although the semiconductor industry is building NVM IC for about 30 years now,… Read More
SNUG and IC Compiler II
I have been at SNUG for the last couple of days. The big announcement is IC Compiler II. It was a big part of Aart’s keynote and Monday lunch featured all the lead customers talking about their experience with the tool.
The big motivation for IC Compiler II was to create a fully multi-threaded physical design tool that will scale… Read More
AMS Verification and Regression Testing of SoC Designs
Digital verification engineers on SoC designs have adopted many techniques to help ensure first silicon success: using compiled simulators, constrained random test, simulation farms, SystemVerilog methodology, and self-checking testbenches. AMS verification has tended to be ad-hoc or sharply divided into separate analog… Read More
Imagine what all the DLP technology can do for you
Light has become integral part of most of the electronic devices we use today in any sphere of influence; personal, entertainment, consumer, automotive, medical, security, and industrial and so on. It’s obvious; along with IoT (Internet-of-Things) devices, the devices to illuminate and display things will play a major role… Read More
Rise of the cloudphone?
We’re all quite twitterpated with the smartphone. Admittedly, it has taken much of the world by storm, and dominates EDA discussion because of the complex SoCs inside. Feature phones have repeatedly been declared dead, or at least disinteresting, but the numbers tell a different story.
While Europe and the US enjoy much higher… Read More
IC Implementation Tool Gets a Rewrite, Now 10X Faster
EDA start-up companies often have the advantage over established vendors by being able to start from scratch, instead of having to maintain some legacy code that no longer is competitive. But what happens when the established vendor decides to rewrite their IC implementation tools from scratch? In this case it’s good news,… Read More
How Students Can Attend DAC for Free
The annual Design Automation Conference (DAC) is a big deal and should be of interest to students considering a career in developing software to help automate some of the toughest design and verification challenges in SoC design. Maybe the cost of attending and traveling to DAC is an issue for you. The organizers of DAC are continuing… Read More
The CAD Team – Unsung Heroes in a Successful Tapeout
For most of my career, I worked as a CAD and design flow engineer. In the fall of 2012, I moved to a different role, as an applications and support manager at ClioSoft Inc. In my opinion, this was a very good opportunity for me to work with other CAD engineers and teams.
Having worked with different CAD teams in my career, I have often felt… Read More
Synchronizer Reliability Metrics
As an example of the need for real-world reliability metrics, consider a modern automobile. We can already buy a car with parking assistance, collision avoidance, autonomous braking and adaptive cruise control features. These new features depend on video image processing that requires high-performance SoC components where… Read More
Top 10 Reasons to Use Vivado Design Suite
Here are the top 10 reasons to use the Xilinx Vivado Design Suite to design your All Programmable Devices:
Reason number 10: Accelerate verification by over 100XThe Vivado Design Suite System Edition lets you do design at the C, C++ or systemC level. But a side-benefit is that you can use these languages for verification at performances… Read More
Real men have fabs!