When it comes to building edge devices for the internet-of-things (IoT), you don’t want to have to break the bank to prototype an idea before diving into the deep water. At the same time, if your idea is to shrink an edge device down to it’s smallest dimensions, lowest power and lowest cost, you really want to be able to prototype your… Read More



Uber’s Epic Fail Changes Everything
This morning at Nvidia’s AI and Deep Learning Conference, GTC 2018, CEO Jen-Hsun Huang will give a keynote in which he will tout the company’s extraordinary progress in fostering and advancing the cause of artificial intelligence and deep learning along with the correlated autonomous driving industry. Hundreds… Read More
Configurability for Embedded FPGA Hard IP
IP providers need to evaluate several complex engineering problems when addressing customer requirements – perhaps the most intricate challenge is the degree of IP configurabilityavailable to satisfy unique customer applications. … Read More
A DVCon Tutorial on Advanced Formal Usage
Synopsys has been quite active lately in their messaging around formal verification. One such event at DVCon this year was a tutorial on some of the more advanced techniques/ methodologies that are accessible to formal teams, mostly presented by customers, though opened by a Synopsys presentation. The tutorial covered so many… Read More
Vertical Prototyping with Intel FPGAs
It has been an article of faith in the design tools business that there’s little to be gained from targeting market verticals because as far as tools are concerned, all verticals have the same needs. Which is good in some respects; you maximize the breadth of the market to which tooling can appeal. But in so doing the depth of contribution… Read More
Aart de Geus At the Heart of Impact!
At the Silicon Valley SNUG 2018, Synopsys Chairman and co-CEO Dr. Aart de Geuss gave his keynote speech addressing attendees on how far we have evolved, and at times encountered the aha factor that helps propel us to the next level. He explored trends as well as the current state of his company solution offerings.
Moore’s Law, Digital… Read More
FPGA, Data and CASPA: Spring into AI (2 of 2)
Adding color to the talks, Dr. Jeff Welser, VP and IBM Almaden Research Lab Director showed how AI and recent computing resources could be harnessed to contain data explosion. Unstructured data growth by 2020 would be in the order of 50 Zetta-bytes (with 21 zeros). One example, the Summit supercomputer developed by IBM for use at… Read More
Uber’s Monkey in the Wrench
The news of a pedestrian fatality in Tempe, Ariz., resulting from the operation of an Uber autonomous vehicle has set off alarm bells throughout the AV development community. As always in such circumstances there will be a simultaneous rush to judgement and the immediate termination of all such testing, as well as a call for calm… Read More
Qualcomm, AMD on Verification with Synopsys
Synopsys hosts a regular lunch at DVCon each year (at least over the last few years I have checked), a nice meal and a show, opening a marketing update followed by 2-3 customer presentations on how they use Synopsys verification in their flows. This year’s event was moderated by Piyush Sancheti from Synopsys Verification marketing… Read More
FPGA, Data and CASPA: Spring into AI
Just like good ideas percolate longer, we have seen AI adoption pace picking-up speed, propelled by faster GPUs. Some recent data points provide good indication that FPGA making a comeback to bridge chip-design needs to keep-up with AI’s ML applications.
According to the Deloitte research firm there is a projected increase of… Read More
Intel’s Path to Technological Leadership: Transforming Foundry Services and Embracing AI