PCIe, or peripheral component interconnect express, is a very popular high-speed serial computer expansion bus standard. The width and speed the standard supports essentially defines the throughput for high-performance computing (HPC) applications. The newest version, PCIe 6.0 promises to double the bandwidth that the… Read More
Ceva Unleashes Wi-Fi 7 Pulse: Awakening Instant AI Brains in IoT and Physical RobotsIn the rapidly evolving landscape of connected devices,…Read More
Adding Expertise to GenAI: An Insightful Study on Fine-TuningI wrote earlier about how deep expertise, say…Read More
EDA Has a Value Capture Problem — An Outsider’s ViewBy Liyue Yan (lyan1@bu.edu) Fact 1: In the…Read More
WEBINAR: How PCIe Multistream Architecture is Enabling AI ConnectivityIn the race to power ever-larger AI models,…Read More
A Six-Minute Journey to Secure Chip Design with CaspiaHardware-level chip security has become an important topic…Read MoreCreative Applications of Formal at Intel
One of the sessions I enjoyed at the Synopsys Verification Day 2021 was a presentation on applying formal to a couple of non-traditional problem domains. I like talks of this kind because formal can sometimes be boxed into a limited set of applications, under-exploiting the potential of the technology. Intel have built a centralized… Read More
CEO Interview: Mo Faisal of Movellus
Prior to founding Movellus, Dr. Faisal held positions at semiconductor companies such as Intel and PMC Sierra. Faisal received his B.S. from the University of Waterloo, and his M.S. and Ph.D. from the University of Michigan, and holds several patents. Dr. Faisal was named a “Top 20 Entrepreneur” by the University of Michigan Zell… Read More
System Technology Co-Optimization (STCO)
My first exposure to seeing multiple die inside of a single package in order to get greater storage was way back in 1978 at Intel, when they combined two 4K bit DRAM die in one package, creating an 8K DRAM chip, called the 2109. Even Apple used two 16K bit DRAM chips from Mostek to form a 32K bit DRAM, included in the Apple III computer, circa… Read More
High-Performance Natural Language Processing (NLP) in Constrained Embedded Systems
Current technology news is filled with talk of many edge applications moving processing from the cloud to the edge. One of the presentations at the recently concluded Linley Group Fall Processor Conference was about AI moving from the cloud to the edge. Rightly so, there were several sessions dedicated to discussing AI and edge… Read More
Siemens EDA will be returning to DAC this year as a Platinum Sponsor.
The 38th Design Automation Conference is next week and this one is for the record books. Having been virtual the last two years, next week we will meet live once again. I think we may have all taken for granted the value of live events but now we know how important they are on both a professional and human level, absolutely.
“The… Read More
Silicon Catalyst Hosts an All-Star Panel December 8th to Discuss What Happens Next?
Each year, Silicon Catalyst assembles a panel of industry luminaries to discuss important questions about the future. The charter of the Silicon Catalyst Industry Forum is to: “create a platform for broad-topic dialog among all stakeholders involved in the semiconductor industry value chain. The Forum topics focus on technical… Read More
Big Data Helps Boost PDN Sign Off Coverage
The nearly unavoidable truth about dynamic voltage drop (DVD) signoff for power distribution networks (PDN) is that the quality of results depends on the quality and quantity of the vectors used to activate the circuit switching. As SOCs grow larger and are implemented on smaller nodes, the challenges of sufficient coverage … Read More
Empyrean Technology‘s Complete Design Solution for PMIC
Power management integrated circuits (PMICs) are integrated circuits for power management. Driven by the strong demand in consumer electronics, IoT, and the automobile industry, the design for PMIC is getting more challenging in terms of integration, reliability and efficiency. The design methodology needs to be updated… Read More
Podcast EP50: What happens next in the CPU and GPU wars?
Tom is the creator of the Moore’s Law Is Dead YouTube Channel and Broken Silicon podcast. He creates videos and writes articles containing in-depth commentary and analysis of what’s going on in Technology, Gaming, and Computer Hardware; and also recaps the news and interviews people working within the gaming &… Read More


AI RTL Generation versus AI RTL Verification