What XiangShan Got Right—And What It Didn’t Dare TryAn Open ISA, a Closed Mindset — Predictive…Read More
The Critical Role of Pre-Silicon Security Verification with Secure-IC’s Laboryzr™ PlatformAs embedded systems and System-on-Chip (SoC) designs grow…Read More
-AMAT put up good numbers despite slowing cycle
-Growing backlog will help them manage declining orders
-Parts shortages still haunt but improving for 2-4 more quarters
-2023 will be down- too early to tell how much- 2024 who knows
Applied put up revenue of $6.7B and EPS of $2.03 versus … Read More
The semiconductor market declined 6.3% in 3Q 2022 from 2Q 2022, according to WSTS. Based on the outlook for 4Q 2022, the second half of 2022 will be down over 10% from the first half of 2022. The 2H 2022 decline will be the largest half-year decline since a 21% drop in the first half of 2009 versus the second half of 2008 during the great … Read More
Dan is joined by Nir Shapira, business development director in CEVA Mobile Broadband BU. Nir has been in the communication industry for more than 25 years. He has made significant contributions to standardizations, notably 802.11, and has dozens of patents in the field of communications.
Nir discusses the impact Ceva IP and … Read More
I just got this notice from my good friend and fellow sailor Rich Curtin. The Silicon Catalyst events are the best open networking events in Silicon Valley, absolutely. And this one includes another good friend Wally Rhines, the most interesting man in semiconductors, so you don’t want to miss this. The live event will definitely… Read More
The differences between commercial FPGA Prototyping (“Prototyping”) and Emulation have been well documented by the purveyors of commercial Prototyping and Emulation solutions, and the technical media. What has received less coverage is how Prototyping benefits differ from Emulation benefits. Both are intended to reduce… Read More
Whether it is the stock market or the semiconductor market, the name of the game is yield. In semiconductors, yield has to do with minimizing scrap costs in all phases of manufacturing. This means squeezing as many good dies from a wafer as well as maximizing the number of good assembled/packaged chips that pass system level testing.… Read More
Dan is joined by Dr. Xavier Rottenberg, who has been at IMEC Leuven since 2000, where he contributes to research in the field of RF, RF-MEMS, photonics and microsystems modelling integration.
Dan explores some of the unique imaging technology being developed at IMEC. Manufacturing methods to implement large sensors cost effectively… Read More
Configurable processors are hot now, in no small part thanks to RISC-V. Which is an ISA rather than a processor, but let’s not quibble. Arm followed with configurability in Cortex-X. Both were considerably preceded (a couple of decades) by Synopsys ARC® RISC CPUs and CEVA DSPs. Each stressed configurability as a differentiator… Read More
Before chiplets arrived, it seemed like designing an electronic system was a bit simpler, as a system on chip (SoC) methodology was well understood, and each SoC was mounted inside a package, then the packages for each component were interconnected on a printed circuit board (PCB). The emerging trend to design a 3D IC using chiplets… Read More
An earlier post on SemiWiki discussed how deep data analytics helps accelerate SoC product development. The post presented insights into proteanTecs’ technology and quantified the benefits that can be derived by leveraging the software platform for SoC product development. You can review that earlier blog here. The power … Read More
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A Quick Tour Through Prompt Engineering as it Might Apply to Debug