According to a press release made last year by Gartner, “the world’s leading information technology research and advisory company,” there is projected to be nearly 21 billion internet connected devices by the year 2020 . With the Internet of Things’ ever growing list of network connected devices, the demand for more compact, more cost effective, and more power efficient microprocessors is at an all time high and will only continue to grow. In order to keep up with this demand, engineers across multiple continents have begun to research the next generation of microscopic transistors. A recent project titled “Ion-irradiation-induced Si Nanodot Self-Assembly for Hybrid SET-CMOS Technology”(IONS4SET), coordinated by Helmholtz-Zentrum Dresden-Rossendorf, is exploring one possible answer to this demand that comes in the form of single electron transistors.
Single electron transistors, referred to as (SETs), like the more common field effect transistors (FETs) are a “three terminal switching device” . Both SETs and FETs have a source and a drain terminal, whose connection to one another is controlled by a signal on the gate, however, the similarities begin to end there. In addition to gate, source, and drain, SETs also have a quantum dot, called the island, in the center with an insulating barrier known as the tunneling junction on either side, creating a barrier between the island and the source and drain. When a capacitance is created on the gate and thus a capacitance on the island, it raises the electron’s energy above the coulomb blockade energy, allowing the quantum phenomenon known as Tunnel Effect to occur, transferring (as the name suggests) a single electron from the source to the drain through the tunneling junctions . The design is in contrast to the many, many electrons that are simultaneously allowed to flow from source to drain in a field effect transistor.
Because SETs only manipulate one electron at a time, single electron transistors offer two very promising advantages over transistors in use today. The first being, the incredibly small size. Current generation transistors in production today by Intel are 22nm with 14nm arriving in the near future, on the other hand, the SETs being developed by the IONS4SET group using their “bottom-up self assembly process” for fabrication are achieving feature sizes of approximately 2 nm . With a decrease in size there is a decrease in power consumption. SETs with feature sizes of only a few atoms take an astonishing little amount of power to function. SETs small size and low power consumption are what make them so promising, with two-thirds of the holy trinity of transistors(smaller size, lower power consumption, and lower cost), SETs are well on their way to being a favorite of manufacturers to use in their products.
While very promising, SETs do not operate with impunity. SETs are very sensitive to thermal noise, meaning in their current state they are incapable of operating at room temperature requiring a very low temperature operation of 4 to 2 kelvin. Another major obstacle in SET implementation is its incompatibility with current CMOS logic. Current CMOS technology has a voltage threshold that must be met before normal operation is possible and also require, when compared to SETs, a relatively large amount of power. Current SETs are so low power that transfer of energy beyond itself is very difficult and is too weak to interact with CMOS. In order to bridge the gap between SET and MOSFET the signal from the SET must be amplified to a level suitable for MOSFETs, which in itself is difficult, requiring “very sensitive MOSFET transistors” . A way around this amplification process would be to create an all new logic based on the single electron transistor and its quantum functions, but this is still very far from being a viable option and wouldn’t help the compatibility issues already present.
Beyond the limitations of the SET itself is the issue of fabricating SETs on a large scale. The widely used lithographic and photolithographic fabrication methods are difficult to control at the resolution required to create the SETs . A new fabrication method is one of the main goals of the IONS4SET project, potentially resulting in a new, reliable mass fabrication method with the precision needed, but not yet met by current methods.
There are various applications of Single Electron transistors . The primary implementation of SETs is in memory cells, as it utilizes quantum dots to store a large amount of information. Due to its incredibly small size of 2 nm, SETs allow more cells to be used in a small area thus lowering the power usage and making the circuit integration more effective . The SETs are also used as efficient charge sensors meaning it reads the charges of the qubits stored in the Quantum dot. By this process , the charge transition for both high and low conductance can be observed . Due to its sensitive nature ,SETs can also detect infrared radiations; “By exciting electrons over an electrically induced energy barrier, both the range of detectable wavelengths and the sensitivity of the device can be controlled” . Other applications also include SET oscillators which is useful for radio frequency systems
The future of electronics relies on the production of smaller and more efficient transistors. Engineers are working hard to discover the next great advancement in transistor design and fabrication to meet the growing demand. Single electron transistors offer one promising path leading to that advancement, but there is still a long way to go. It has to overcome difficulties in production, as well as, problems with implementation with current technology. Even still, the future is very bright for single electron transistors hopefully leading to new microscopic transistors making it possible to connect the new, vast array of future devices.
By Maisha Sadia and Beau McCarty
R. van der Meulen, “Gartner Says 6.4 Billion Connected ‘Things’ Will Be in Use in 2016, Up 30 Percent From 2015,” “Things” Will Be in Use in 2016, Up 30 Percent From 2015, 10-Nov-2015. [Online]. Available at: http://www.gartner.com/newsroom/id/3165317. [Accessed: 23-Feb-2016].
V. P. Singh, A. Agrawal, and S. B. Singh, “Analytical Discussion of Single Electron Transistor (SET),” International Journal of Soft Computing and Engineering(TM), 03-Jul-2012. [Online]. Available at: http://www.ijsce.org/. [Accessed: 23-Feb-2016].
H.-Z. D.-R., “Ion-irradiation-induced Si Nanodot SelfAssembly for Hybrid SET-CMOS Technology,” Ion-irradiation-induced Si Nanodot SelfAssembly for Hybrid SET-CMOS Technology, 02-Aug-2016. [Online]. Available at: https://www.hzdr.de/db/cms?poid=45667.
D. AGUIAM and O. B. R. E. C. Z. Á. N. Vince, “A Brief Introduction to Single Electron Transistors,” Tecnico Lisboa, 18-Dec-2011. [Online]. Available at: https://fenix.tecnico.ulisboa.pt/downloadfile/3779578912209/aguiam_obreczan__introset_nov2011.pdf. [Accessed: 23-Feb-2016].
E. P. Nordberg, H. L. Stalford, R. Young, G. A. T. Eyck, K. Eng, L. A. Tracy, K. D. Childs, J. R. Wendt, R. K. Grubbs, J. Stevens, M. P. Lilly, M. A. Eriksson, and M. S. Carroll, “Charge sensing in enhancement mode double-top-gated metal-oxide-semiconductor quantum dots,” Appl. Phys. Lett. Applied Physics Letters, vol. 95, no. 20, p. 202102, 2009.
A. Kumar and D. Dubey, “Single Electron Transistor: Applications and Limitations ,” Advance in Electronic and Electric Engineering, vol. 3, no. 1, 2013 pp. 57-62.Share this post via: