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Xilinx: Delivering a Generation Ahead

Xilinx: Delivering a Generation Ahead
by Paul McLellan on 02-19-2014 at 4:15 pm

Last week was Xilinx’s investor day. Xilinx believe they are now a process generation ahead. They did over $100M in 28nm designs in FY2013 (Xilinx FY ended March 2013) and did over over $100M in Q4 2013 calendar year alone (and this is almost all true production volume, with only about 5% prototypes) with a plan greater than $350M for the whole fiscal year 2014 (which ends in March 2014) and twice that in fiscal year 2015. That’s revenue momentum.

Until 28nm Xilinx’s technology broadly enabled programmable devices with FPGA fabric loaded up with logic. From 28nm for the next few process nodes, it is algorithms, logic, microprocessors, tranceivers, buses…oh yes and FPGA fabric. In fiscal year 2012 Xilinx had 50% 28nm market share and last fiscal year that grew to 60%. This fiscal year 28nm market share will be around 70% (70% market share is more than $350M). It looks like they are pulling away from Altera, the main competition.

Xilinx reckon they have 5 big advantages that they put under the catchy name FACTS:

  • F is for Foundry. The foundry is TSMC. Xilinx have parts in 28nm in high volume production, are shipping in 20nm and are working on 16nm FinFET.
  • A is for Architecture. Both the Zync SoC arrays and the 3D packaging technology where Xilinx have been a pioneer (and were honored at the SEMI dinner in January)
  • C is for Circuits. DSP, Serdes, ARM processors, buses and more
  • T is for Total Execution. Hmm, I guess they didn’t like FACES as an acronym. First to market, meeting all specs, <2ppm, and the highest quality with zero errata.
  • S is for Software. Xilinx have made big investment and completely retooled their software for the SoC era with Vivado, the Ultrafast Design Methodology and All Programmable Abstractions.

At 20nm/16nm they plan to repeat the formula. Here are the FACTS:

  • Foundry is TSMC for both process nodes
  • Architecture: 3D IC ultrascale and MP SOC ultrascale. And Virtex-7 is 35% smaller than Stratix-iV (both in 28nm)
  • Circuits: continue to port and broaden the portfolio
  • Total Execution: repeat the successful 28nm ramp
  • Software: Vivado (4X runtime advantage and higher utlization), the Ultrafast Design Methodology (10X faster) and All Programmable Abstractions including C and IP based designs (15X)


Four more places where Xilinx is well positioned (no catchy acronym this time):

  • markets: focus on areas of industry growth such as smart data centers, smarter networks, visioin and connected control, wired networks
  • accelerating transition to Xilinx’s programmable solutions from ASIC/ASSP. Phase 1 was 90/40nm broadening the use of FPGAs. Phase 2 is 28/20nm with differentiated and smarter all-programmable devices. Phase 3 at 16nm with reusable programmable systems integration platforms
  • users: with the push to higher levels of abstraction Xilinx will not just reach traditional ASSP/ASIC users but increasingly systems engineers and software engineers
  • Portfolio. Xilinx will be running 3 nodes concurrently (28/20/16nm). 28nm is optimal price/performance/watt. 20nm brings higher performance architectures. 16nm complements with FinFET and increased memory options


Bottom line: with all these advantages Xilinx consider that they are a full node ahead of the competition.

Analysts seemed to like what they saw. Xilinx stock is trading over $50 at a 52 week high. You can download the presentations from that day hereand listen to the webcast here. There is apparently a transcript on Seeking Alpha too, but I haven’t been able to find it. If anyone does, post a link in the comments.


More articles by Paul McLellan…


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