2026 IEEE International Solid-State Circuits Conference (ISSCC)

San Francisco Marriott Marquis San Francisco Marriott Marquis, 780 Mission Street, San Francisco, CA, United States

About ISSCC The International Solid-State Circuits Conference is the foremost global forum for presentation of advances in solid-state circuits and systems-on-a-chip. The Conference offers a unique opportunity for engineers working at the cutting edge of IC design and application to maintain technical currency, and to network with leading experts. What’s New Download the ISSCC 2026 …

Chiplet Summit 2026

Santa Clara Convention Center Santa Clara Convention Center, 5001 Great America Pkwy, Santa Clara, CA, United States

All the Solutions for Developing Chiplets 2025 Keynote Addresses from Industry Leaders: Alphawave Semi, Arm, Cadence Design Systems, Keysight, Open Compute Project, Synopsys, Teradyne 2025’s Main Topics Included: AI/ML Acceleration, Open Chiplet Economy, Advanced Packaging Methods, Die-to-die Interfaces, Working with Foundries signup to be a 2026 SPONSOR / Exhibitor REGISTER HERE

Wafer-Level Packaging Symposium 2026

Hyatt Regency San Francisco Airport 1333 Bayshore Highway, Burlingame, CA, United States

Formatting Advanced Packaging for the Next Generation The evolution of Advanced Package Technology is experiencing substantial changes as system designs directly drive package performance requirements—an unprecedented development in the industry. Historically, architects constructed circuits within packaging constraints to prevent undesirable outcomes. Nevertheless, increasing transistor expenses and the demand for improved power efficiency necessitate advancing package …

Semitracks Course: Defect-Based Testing

Munich, Germany Munich, Germany

Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example, today's application-specific ICs and microprocessors can contain upwards of 100 million transistors. Traditional testing relies on the stuck-at-fault (SAF) to model defect behavior. Unfortunately, the SAF model is a poor model for defects. Other models and strategies are required to catch …

SPIE Advanced Lithography + Patterning 2026

San Jose McEnery Convention Center San José McEnery Convention Center, 150 W San Carlos St, San Jose, CA, United States

From materials to metrology: pushing the limits of lithography Share your research, challenges, and breakthroughs at this leading semiconductor conference in San Jose Submit your abstract and connect with leading researchers advancing solutions in optical lithography, EUVL, patterning technologies, metrology, and process integration for semiconductor manufacturing and related applications. Call for papers is now open. …

Semitracks Course: Wafer Fab Processing

Munich, Germany Munich, Germany

Semiconductor and integrated circuit developments continue to proceed at an incredible pace. The industry as a whole has gotten to this point of incredible complexity through the process of countless breakthroughs and developments in wafer fab processing. Today's wafer fab contains some of the most complex and intricate procedures ever developed by mankind. Wafer Fab Processing is …

FLEX 2026 – Technology Summit

The WIGWAM The Wigwam, 300 E Wigwam Blvd, Litchfield Park, AZ, United States

FLEX 2026 | TECHNOLOGY SUMMIT | FEBRUARY 24-26, 2026 THE WIGWAM ARIZONA RESORT | PHOENIX, AZ A 25th Anniversary Celebration Escape the winter and celebrate 25 years of innovation with us at The Wigwam Arizona Resort in Phoenix, AZ. FLEX—Technology Summit is a vibrant networking event designed to foster community building. Connect with like-minded professionals, share ideas, and forge …

Semitracks Course: Failure and Yield Analysis

Munich, Germany Munich, Germany

Failure and Yield Analysis is an increasingly difficult and complex process. Today, engineers are required to locate defects on complex integrated circuits. In many ways, this is akin to locating a needle in a haystack, where the needles get smaller and the haystack gets bigger every year. Engineers are required to understand a variety of …

DVCON U.S. 2026

Hyatt Regency Hotel, Santa Clara, CA Santa Clara, CA, United States

DVCon is the premier conference on the application of languages, tools, and methodologies for the design and verification of electronic systems and integrated circuits. The focus of the conference is the usage of specialized design and verification languages such as SystemVerilog, Verilog, VHDL, PSS, SystemC and e, as well as general purpose languages such as …

Semitracks Course: Semiconductor Reliability and Product Qualification

Munich, Germany Munich, Germany

Product reliability and qualification continues to evolve with the electronics industry. New electronics applications require new approaches to reliability and qualification. In the past, reliability meant discovering, characterizing and modeling failure mechanisms, and determining their impact on the reliability of the circuit. Today, reliability can involve tradeoffs between performance and reliability; assessing the impact of …

embedded world 2026

Exhibition Centre Nuremberg Exhibition Centre Nuremberg, Messezentrum 1, Nürnberg, Germany

Global platform for the embedded community The embedded world Exhibition&Conference provides a global platform and a place to meet for the entire embedded community, including leading experts, key players and industry associations. It offers unprecedented insight into the world of embedded systems, from components and modules to operating systems, hardware and software design, M2M communication, …

Semitracks Course: EOS, ESD and How to Differentiate

Munich, Germany Munich, Germany

Electrical Overstress (EOS) and Electrostatic Discharge (ESD) account for most of the field failures observed in the electronics industry. Although EOS and ESD damage can at times look quite similar to each other, the source each and the solution can be quite different. Therefore, it is important to be able to distinguish between the two …