Samtec Ushers in a New Era of High-Speed Connectivity at DesignCon 2026

As I’ve discussed before, Samtec has a way of dominating every trade show the company participates in. The upcoming DesignCon event is no exception. At the show, Samtec will be discussing data rates up to 448 Gbps and signals up to 130 GHz. Beyond a rich set of demonstrations in the company’s booth, Samtec engineers will be participating as authors and/or speakers in papers, panels, and sponsored sessions throughout the conference. Attendees will even be treated to a bar crawl. DesignCon is a major event not to be missed, and Samtec’s presence makes it even more worthwhile. Let’s see how Samtec ushers in a new era of high-speed connectivity at DesignCon 2026.

At the Samtec Booth (939)

A main focus will be demonstrations of Samtec’s CPX offerings, including co-packaged copper (CPC) and co-packaged optics (CPO) solutions. Demonstrations will include Si-Fly® HD CPC connectors operating at 224 Gbps. Other booth demonstrations will include Samtec’s new Si-Fly® backplane system that supports 224 Gbps signals. This includes a 112 Gbps active optics demonstration incorporating Samtec’s FireFly and new Halo products.

You can also see Samtec’s distinctive orange Nitrowave RF cable as part of the new Bulls Eye BE71A test assembly for 224Gbps PAM4 SERDES and the Bulls Eye BE130 test assembly running 448 Gbps differential signals for test channels. Samtec will also showcase advancements in material science with its SureCoat ultra-rugged coatings for high temperatures and harsh environments.

Samtec in the Conference Agenda (and More)

February 25, 8:00 AM – 8:45 AM, Ballroom G

Improving Spectral Efficiency by Optimizing Sub-Nyquist Equalization for 448 Gbps

While 224 Gbps PAM4 systems are currently under development, standards bodies such as IEEE and OIF are already investigating 448 Gbps solutions.  Doubling the data rate to 448 Gbps also doubles the Nyquist frequency—from 56 GHz to 112 GHz—posing significant new challenges. The objective of this paper is to make a comprehensive analysis identifying the best equalizers to recover a 448 Gbps PAM4 signal on a channel whose spectrum shows a significant roll-off or resonances laying below Nyquist frequency.

February 25, 12:10 PM – 12:50 PM, Great America 1

Successful PCIe 6.0 and 7.0 System Guidelines

As PCI-SIG moved to PAM4 modulation, the interconnect budget constrained requiring improved loss and noise.  This talk discusses the recipes for a robust PCIe 6.0 and 7.0 system, validating case studies by the PCI-SIG pre-layout channel compliance methodology.

February 25, 12:15 PM – 1:00 PM, Ballroom G

Distributed Capacitor Characterization for Advanced Packaging

Distributed capacitors play a crucial role in ensuring power integrity in modern GPUs, which demand high current delivery and minimal voltage ripple at ever-increasing switching speeds. A systematic modeling approach has been developed to capture the electrical characteristics of these distributed capacitive structures. The proposed models were extensively validated through correlation with VNA measurements conducted across wide voltage and temperature ranges.

February 25, 3:00 PM – 3:45 PM, Ballroom E

An Improved Broadband Material Characterization Method

A novel method utilizing airline measurements is introduced to accurately and efficiently determine the dielectric constant and loss tangent of a material for broadband applications. This method is independent of metal loss and physical lengths, thus eliminating errors from measurement uncertainties. The proposed method has been validated through simulations and comparisons with commercial resonator methods.

February 26, 2:00 PM – 2:45 PM, Ballroom H

Lessons Learned at 224 Gbps

Design-in for 224 Gbps architectures has begun, due largely to the intensive data needs of AI HW architectures. This expert discussion will examine how we can design, build, and test 224 Gbps systems and achieve acceptable SI in light of technological and physical limitations.

February 24, 4:45 PM – 6:00 PM, Ballroom A

Panel – Designing & Validating the Future: SERDES & Channel Innovations for PCIe at 128 GT/s

Continuing the tradition of previous years, this panel will focus on the latest updates and changes to the PCIe signaling and physical topologies with focus on PAM4 signaling and the PCIe 7.0 specification. Building upon this panel’s past contributions, this year’s participants bring a diverse knowledge base to discuss the latest advancements simulation, design, and innovative test and measurement methodologies required for these current and future PAM4 inflection points. Additional topics include correlation between simulation and validation, design practices for PCIe over optical cables and through electrical pathways, and signal integrity complications.

And of course, join Samtec at the company’s booth on Wednesday from 5:00-6:00pm during the DesignCon booth bar crawl.

Samtec Conference Experts in Attendance

Two of Samtec’s staff members have earned the prestigious title of Engineer of the Year at DesignCon. They are noted in the conference homepage:

Last year was the 30^th anniversary of DesignCon. In honor of that, Istvan Novak provided an informative perspective on the history of DesignCon. You can read that interview here.

To Learn More

You can see more detail about Samtec’s participation in DesignCon 2026 here.  You can register for the show here. And don’t forget to Register with the Samtec VIP code: INVITE373903 to receive a free Expo Pass or a 15% discount on conference passes.  And that’s how Samtec ushers in a new era of high-speed connectivity at DesignCon 2026.

Also Read:

2026 Outlook with Mathew Burns of Samtec

Webinar – The Path to Smaller, Denser, and Faster with CPX, Samtec’s Co-Packaged Copper and Optics

Samtec Practical Cable Management for High-Data-Rate Systems