Those of us who spend a lot of time at EDA marketing events cannot help but notice the dramatic shrinking of the floor space, and to some extent attendance, at the major EDA shows such as DAC and DATE. DAC used to occupy both the north and south halls of Moscone Center when in San Francisco, but now only takes up one hall. So, I did not have high expectations when going to DVCon 2013 in San Jose, California this week – but I was very pleasantly surprised.
First, the decline in the number of exhibitors at DAC is not the fault of MP Associates, the company that runs DAC (and DVCon). Very simply there are many less EDA companies now than there were ten years ago. I believe the cause of this contraction was a combination of a bad international economy and Mike Fister’s misguided belief that Cadence would not make any more significant acquisitions. Upon arriving at Cadence in 2004, Mr. Fister announced that not only would Cadence not use acquisitions as part of its development strategy, but he also shut down Telos Ventures, Cadence’s own venture capital company. By then Telos had three EDA veterans – Bruce Bourbon, Jim Hogan, and Charlie Huang – making investments in EDA and other high technology areas. Closing Telos took tens of millions of dollars in early round funding off the market and signaled to other investors that now was the time to exit EDA. Of course we can now easily see that Mr. Fister’s prediction was wrong, but the damage has been done and the seed and A round money has simply dwindled to near zero.
Another reason for the decline is the rise of the private shows offered by the big EDA companies. Customers have a limited travel budget for attending trade shows. Some may only choose to attend SNUG and CDN Live. Particularly the customers’ EDA department management can only attend so many shows. Some will therefore not make it to DAC or DATE. So the open shows see less attendance due to the pull from private shows as well.
But, while DAC has seen a decline, DVCon is breaking its previous attendance records and this year’s exhibit area was hopping with customers and vendors – 33 vendors with only one unused booth. There are several reasons for this. First, design verification is one of the fastest growing segments of EDA as it is one of the crucial elements in the overall system design space. With ever increasing content in chips, the job to verify all that content gets more difficult every year. Customers are investing in simulation environments, increasing use of formal techniques such as assertion-based verification, simulators, emulators, verification services, and verification intellectual property (VIP). Secondly, DVCon is a very focused show. The attendees and the employees from the vendors attending the show all have a tight focus on verification. They are passionate about it, but there is also a greater sense of the need for collective solutions. Yes, Synopsys and Cadence had larger booths, but they did not suck attendees off the floor and keep them away from the other vendors, as they often do at DAC. There were lots of discussions between the vendors and signs of cooperation in this segment. I think Accellera plays a significant role in this behavior as well.
Part of the reason the focus on this segment works well is it is just the right breadth of technology. Contrast this with DesignCon. The product range at DesignCon spans at least from logic synthesis to design rule checking (DRC). And there are so many design creation and analysis tools in between, plus a significant array of semiconductor IP vendors. It is so large it hardly seems like there is any focus at all. It’s scope is still more than half of the scope at DAC. DVCon’s focus adds to the buzz because all the attendees are talking about the same thing – their energy builds on one another.
I hope that MP Associates and other trade show organizers will take note of DVCon’s success and try to come up with other events of similar scope. It was nice to feel the excitement around a segment of EDA again. Thank you, DVCon.Share this post via: