Webinar: An end-to-end functional safety solution for automotive ICs based on ISO 26262
January 29 @ 8:00 AM - 9:00 AM
Development of automotive ICs requires substantial and meticulous effort to ensure their compliance with the ISO 26262 standard. The process involves end-to-end evaluation of a chip’s design, development, and traceability of the systematic and safety workflows through lifecycle management. Engineers must create a Failure Modes, Effects and Diagnostic Analysis (FMEDA), and ensure that the chip meets stringent requirements based on their Automotive Safety Integrity Level (ASIL) targets.
Requirements gathering, tracking, safety analysis, and validation all play a critical role; where collaboration between cross-functional teams of safety managers, hardware, software, and verification engineers is needed to guarantee that the chip meets the specified safety standards.
In this webinar we will walk you through the closed-loop solution offered by Siemens EDA — from requirements gathering, FMEDA, safety analysis, fault injection and back to merging the results to generate the work products necessary for certification.
- An overview of functional safety concepts
- The functional safety flow and tools offered by Siemens EDA
Who Should Attend:
- Design and Verification Engineers interested in learning more about functional safety.
Products Covered:
- Next-gen FMEDA
- Safety Scope
- Next gen KaleidoScope (Questa next gen fault sim)
Speakers:
Ann Keffer
Functional Safety Verification Product Marketing Manager, Siemens EDA
Ann Keffer is the worldwide Product Marketing Manager for functional safety verification at Siemens EDA.
Ann received her undergraduate degree in computer science and mathematics and started her career as a software developer for Hewlett Packard. After a successful career in management roles at Hewlett Packard, she led worldwide marketing and product management for companies in the automation, robotics and automotive functional safety verification industries. She joined Siemens EDA June of 2019.
Jyothy M Jaganathan
Functional Safety Product Engineer, Siemens EDA
Jyothy M Jaganathan is lead Functional Safety product engineer at Siemens EDA based in Austin, TX.
With over 12 years of experience in the semiconductor industry, Jyothy is a seasoned Design Verification (DV) Engineer specializing in functional safety tools. Jyothy has previously held key roles at IBM, GlobalFoundries, and Marvell, contributing to chip tape-outs and verification processes.
The Intel Common Platform Foundry Alliance