WP_Term Object
(
    [term_id] => 14
    [name] => Synopsys
    [slug] => synopsys
    [term_group] => 0
    [term_taxonomy_id] => 14
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 694
    [filter] => raw
    [cat_ID] => 14
    [category_count] => 694
    [category_description] => 
    [cat_name] => Synopsys
    [category_nicename] => synopsys
    [category_parent] => 157
)
            
800x100 Efficient and Robust Memory Verification
WP_Term Object
(
    [term_id] => 14
    [name] => Synopsys
    [slug] => synopsys
    [term_group] => 0
    [term_taxonomy_id] => 14
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 694
    [filter] => raw
    [cat_ID] => 14
    [category_count] => 694
    [category_description] => 
    [cat_name] => Synopsys
    [category_nicename] => synopsys
    [category_parent] => 157
)

SoC’s Shift Left Needs Software Integrity

SoC’s Shift Left Needs Software Integrity
by Pawan Fangaria on 05-05-2015 at 3:00 pm

Since Aart de Geus, co-CEO and co-founder of Synopsys, gave his keynote at the Synopsys User Group (SNUG) conference in Silicon Valley last March, I’ve been hearing a lot more about the “Shift Left” in semiconductor design. Although I couldn’t attend Synopsys’ 25[SUP]th[/SUP]SNUG, I found some short videos on the Synopsys website in the News Room that summarized key ideas that were discussed there, including this “Shift Left.”

At the SNUG Designer Community Expo, Synopsys’ Phil Dworsky, Director of Strategic Alliances, interviewed Aart de Geus and Andreas Kuehlmann, GM and Sr. VP of Synopsys’ Software Integrity Group. Here are my key takeaways from these videos –

When Aarttalked about SoC design and verification shifting left in his keynote address, he meant something big. It wasn’t simply doing more things faster to accommodate larger SoCs in the same schedule; of course that task itself is not so simple with today’s SoCs containing several functionalities, multiple heterogeneous IP blocks, gate counts running into billions, and a huge heap of software sitting on top of it. Synopsys has already taken a leap in providing SoC design acceleration and productivity through its powerful platforms for designing and verifying SoCs, and developing and re-using IP. Recently, Synopsys introduced IP accelerator kits that enable IPs to be quickly developed and verified in larger designs. Aart says IP is a never ending investment area for Synopsys. That being said about what is already happening; the big question now is how to gain 100 times more productivity from here. That’s where the software comes into the picture. Today, designs are driven by software; there are more software engineers than hardware engineers in semiconductor companies. In Aart’s words, “most of the chips are supercomputers already.” So, the focus is software; that has to be disciplined, strengthened and made robust. It’s software that will take us to larger contexts of designs. Of course, the software development has to be augmented with what we’ve learned from hardware design.

It’s something being pursued on a major scale at Synopsys. Synopsys has even modified its logo. If you haven’t noticed it already, read the line “Silicon to Software” below the logo itself. Aart’s keynote includes more details on the strategy behind this change. It will be interesting to follow how Synopsys executes on this new theme.

In the other video on the News Room page titled, “Silicon to Software,Andreas Kuehlmann talks about what EDA has done for the electronics hardware industry over the last 30 years and how that relates to what Coverity(now part of Synopsys) has been doing for the last 10 years in the software domain. Comparatively, hardware design is much more rigorous; there is sign-off at every stage whereas there is no sign-off of software. Patches are implemented when any problem arises. Enabling developers to find bugs with respect to security and quality early in the development cycle will enable a “Shift Left” in software, as well. But this is a practice that has yet to be adopted into the culture of most software organizations. It has to be a daily routine for software developers and Coverity tools can significantly help there.

Today, IC design includes static and dynamic sign-off tools. Software needs similar solutions to help developers make sure that their applications are secure and provide the intended value to customers. With Coverity’s methodology, developers can make software quality measurable and enforceable through a quality matrix.

See the actual videos “Design Flows: Shifting Left”and“Silicon to Software”here on the Synopsys New Room website. Choose the title from the list of videos at the bottom of the page and click on the video icon; it’s readily viewable without requiring registration.

Also view Aart’s full keynote, “Silicon to Software: Shift Left!

Lessons learned from hardware design must be applied to software development. That’s how software integrity will be realized. I expect we’ll be hearing a lot more about this at future SNUGs.

Pawan Kumar Fangaria
Founder & President at www.fangarias.com

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