Using STA with Aging Analysis for Robust IC Designs

Using STA with Aging Analysis for Robust IC Designs
by Daniel Payne on 06-23-2022 at 10:00 am

Gate Level Aging min

Our laptops and desktop computers have billions of transistors in their application processor chips, yet I often don’t consider the reliability effects of aging that the transistors experience in the chips. At the recent Synopsys User Group (aka SNUG), there was a technical presentation on this topic from Srinivas Bodapati,… Read More


SNUG World

SNUG World
by Admin on 12-23-2020 at 9:20 am

SNUG World
April 20-22, 2021

A Virtual Experience
Submission Deadline: January 27, 2021

Connecting the Synopsys User Community

SNUG World is a reimagined SNUG event connecting the Synopsys global users community in a dynamic virtual experience. SNUG World will continue to foster the link between users and technical experts

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Aart de Geus At the Heart of Impact!

Aart de Geus At the Heart of Impact!
by Alex Tan on 03-26-2018 at 7:00 am

At the Silicon Valley SNUG 2018, Synopsys Chairman and co-CEO Dr. Aart de Geuss gave his keynote speech addressing attendees on how far we have evolved, and at times encountered the aha factor that helps propel us to the next level. He explored trends as well as the current state of his company solution offerings.


Moore’s Law, Digital
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IoT or Smart Everything?

IoT or Smart Everything?
by Daniel Payne on 03-31-2016 at 12:00 pm

I just attended a keynote presentation at SNUG from Aart de Geus, CEO of Synopsys. This event is well attended with some 2,500 people that are learning from the 96 presentations on all things Synopsys, semiconductor. IP, and foundry trends. There are big name sponsors like: GLOBALFOUNDRIES, Samsung, socioeconomic, TSMC, Fujitsu,… Read More