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EDA
Posted on by Daniel Nenni

September is Semiconductor Design Webinar Month!

September is Semiconductor Design Webinar Month!
by Daniel Nenni on 09-01-2014 at 9:00 am
Categories: EDA

The nice thing about webinars is that if you register for the live one and you can’t attend you will still get first notice when the replay goes up. The other nice thing is that you can read a blog review of a webinar or whitepaper on SemiWiki first to see if it is worth your time. If you do attend a webinar you can also post a review of it on SemiWiki if you think it is worth other people’s time, absolutely.

The SemiWiki calendar is one of the most traveled areas and webinars are the primary reason. Members can post webinar notices or other events on the calendar for all to see. Collaboration is the key to the success of the fabless semiconductor ecosystem and webinars are very collaborative.

Looking at September I don’t remember seeing so many webinars in one month but it certainly is an encouraging sign:

[LIST=1]

  • Reduce Your Design Risk By Enabling a Comprehensive Signoff Flow for Timing Constraints
  • VCS AMS for Advanced SoC Mixed-signal Verification
  • Physical Lint: Fast RTL Analysis that Identifies Logic Structures Known to Negatively Impact Design Convergence
  • Flow to improve collaboration within dispersed design teams
  • Pre-silicon Optimization of System Designs using the ARM CoreLink NIC-400 Interconnect
  • SoC Emulation Made Easy
  • Quick Introduction to SCE-MI
  • IP Signoff
  • Static Design Rule Checks in FPGA Design
  • TCAD to SPICE Simulation of SiC and Si Power Devices
  • Powerful and Easy to Use RTL Restructuring
  • TSMC Open Innovation Platform Ecosystem Forum

    Okay, the TSMC OIP is not a webinar but it is definitely a premier fabless semiconductor ecosystem event:

    The TSMC Open Innovation Platform® Ecosystem Forum brings together TSMC’s design ecosystem companies and our customers to share real case solutions to today’s design challenges. Success stories that illustrate best practice in TSMC’s design ecosystem will highlight the event.

    More than 90% of last year’s attendees last year said that the Forum helped them “better understand TSMC’s Open Innovation Platform” and that “they found it effective to hear directly from TSMC OIP member companies.”

    This year’s event will prove equally valuable as you hear directly from TSMC OIP companies about how to leverage their technology to your design challenges!

    This year, the forum is a day-long conference kicking-off with Trend-setting addresses and announcements from TSMC executives.

    The afternoon sessions include 30 selected technical papersfrom TSMC’s EDA, IP, Design Center Alliance and Value Chain Aggregator member companies, and an Ecosystem Pavilion featuring up to 80 member companies showcasing their products and services.

    Date:     Tuesday, September 30th, 2014 8:00 AM – 6:30 PM
    Venue: San Jose Convention Center, CA
    Learn About:

    • Emerging advanced node design challenges including 16 FinFET, 16FinFET+, 20nm, 28nm and TSMC-specific design solutions
    • Successful, real-life applications of design technologies and IP from ecosystem members and other TSMC customers
    • Ecosystem-specific TSMC reference flow implementations
    • New innovations for next generation product designs

    Hear directly from ecosystem companies about their TSMC-specific design solutions

    Network with your peers and 1,000 industry experts and end users.

    TSMC Open Innovation Platform Ecosystem Forum is an “invitation-only” event. Please register to attend. We look forward to seeing you at the 2014 Open Innovation Platform Ecosystem Forum.

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