IBM Cloud: Enabling World-Class EDA Workflows

On July 9, 2025, Derren Dunn from IBM Research’s TJ Watson Research Center delivered a DACtv presentation, as seen in the YouTube video detailing IBM’s EDA-as-a-Solution platform. This innovative offering leverages IBM’s high-performance computing (HPC) cloud to deliver hybrid and cloud-only infrastructure for electronic design automation (EDA) workflows, addressing the semiconductor industry’s escalating computational demands. By integrating AI, machine learning (ML), and advanced infrastructure-as-code (IaC) practices, IBM empowers dynamic chip design and foundry-facing processes with scalability, security, and efficiency.

Dunn introduced EDA-as-a-Solution as a value-added layer atop IBM’s HPC cloud, designed to handle compute-intensive EDA tasks like simulation, verification, and physical design. The platform supports both hybrid cloud (integrating on-premises and cloud resources) and cloud-native environments, offering flexibility for diverse design needs. Key components include IaC tools like Terraform and Ansible, customized kernel and service parameter settings, and vendor-specific configurations. IBM’s proprietary design flows incorporate AI and ML, enhancing tasks such as design space exploration and optimization. This infrastructure is built on robust foundations, including IBM’s LSF (Load Sharing Facility) for job scheduling, Spectrum Scale for storage, and Aspera for high-speed data transfers, all fortified by enterprise-grade security for data protection.

The platform’s architecture ensures seamless integration across client data centers, on-premises systems, and IBM’s cloud. A critical feature is its ability to create Active File Management (AFM) caches from any NFS-exportable mount, addressing an audience question about storage compatibility. Dunn clarified that IBM’s solution works with non-IBM storage systems like NetApp filers or kernel-based NFS servers, enabling efficient data access without costly migrations. For object storage, IBM supports scenarios where it serves as the master data repository, ensuring flexibility for varied enterprise setups. This eliminates data transfer bottlenecks, a common pain point in EDA workflows, by allowing seamless bursting to the cloud as if submitting to a local queue.

AI and ML integration is central to IBM’s offering. By embedding these technologies into design flows, the platform optimizes tasks like timing analysis, power estimation, and layout generation, reducing design cycles. For foundry-facing workflows, IBM’s cloud supports process design kit (PDK) integration and tape-out preparation, ensuring compatibility with major foundries like TSMC and GlobalFoundries. The platform’s linear scaling capabilities, achieved through LSF or Kubernetes-based workflows, cater to both traditional and cloud-native EDA environments, positioning IBM as a forward-looking solution for future-proofing chip design.

Security and scalability are paramount, especially for sensitive IP in semiconductor design. IBM’s high-security data protection chambers safeguard proprietary data, critical for industries like automotive and defense. Dunn emphasized the platform’s ability to handle compute-intensive workloads, addressing the industry’s challenge of insufficient compute resources. By bursting to the public cloud, companies can prioritize design projects without hardware constraints, a significant advantage in an era of trillion-gate SoCs and AI accelerators.

The presentation underscored IBM’s strategic vision: providing a scalable, secure, and AI-enhanced EDA platform that adapts to the semiconductor industry’s evolving needs. By supporting hybrid and cloud-native workflows, IBM ensures designers can leverage existing infrastructure while scaling seamlessly. The session concluded with Dunn inviting attendees to explore IBM’s offerings and join them at DAC 2026 in Long Beach, signaling confidence in their role in driving the next wave of chip design innovation.

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