SNPS1301149083 snug sv 2024 semiwiki 400x400 px v2
WP_Term Object
(
    [term_id] => 15929
    [name] => CEO Interviews
    [slug] => ceo-interviews
    [term_group] => 0
    [term_taxonomy_id] => 15929
    [taxonomy] => category
    [description] => 
    [parent] => 0
    [count] => 152
    [filter] => raw
    [cat_ID] => 15929
    [category_count] => 152
    [category_description] => 
    [cat_name] => CEO Interviews
    [category_nicename] => ceo-interviews
    [category_parent] => 0
)

CEO Interview: Vincent Bligny of Aniah

CEO Interview: Vincent Bligny of Aniah
by Daniel Nenni on 02-09-2024 at 6:00 am

Vincent Bligny is a renowned expert in mixed-signal verification, particularly with transistor-level formal techniques. He spent 15 years in this industry, mainly within STMicroelectronics’ design and verification teams, allowing him to understand the challenges and opportunities of the EDA field.

 Tell us about your company?
Aniah is an EDA startup founded in the French Silicon Valley in Grenoble, in 2019, by Remi Moriceau and I. It relies on several years of joint academic research with the Ecole Normale Supérieure de Lyon (ens-lyon.fr) and the CEA (cea.fr). Aniah is now a 36-employee company, with headquarters in Grenoble, France and a branch office in Taïwan and in the USA in 2024.

What problems are you solving?
Aniah OneCheck detects transistor-level design errors that elude all other verification techniques and is applicable from early design phases to sign-off. We take a no-compromise approach to error detection as any error on Silicon may jeopardize the project’s time to market.

aniah onecheck

Aniah OneCheck has 4 unique advantages:

  • 100% coverage for the targeted transistor-level errors, including all power states – a chip using low-power design techniques will have 1000s of unique power states
  • A user-interface that targets all design engineers with instant learning curve. This interface is designed with highly efficient, batch-analysis capacity in mind
  • 1000 times faster than existing tools – a design with 20 million transistor is analyzed in just 2 seconds. Designs with billions of transistors can be analyzed in a few minutes.
  • Detection of conditional HiZ nets from IP to SoC scale. Our approach has a superior coverage with a comprehensive detection of purely analog errors. This feature extends to detection of DC-path, low-power ageing, and dynamic clocking issues.

Finally, one of our customers’ problems that we contribute to solving is the high energy cost of simulation for mixed-signal verification, estimated by one of our customers at 4 GWh per project.

The formal, rule-based verification done by Aniah OneCheck is intrinsically energy-efficient and leads to a significant reduction in the number of simulations that must be run in Spice or Fast-Spice.

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What application areas are your strongest?
Aniah OneCheck has value for all types of IC design:

  • IP design: checking 100% of the operating modes, automated regression, in-depth verification and generation of Spice testbench and views
  • Analog designs: boost design efficiency with continuous checks. Automation of the design release process (checklists)
  • Mixed-signal ICs: check the consistency of IPs / analog / digital blocs across the full scale of operating modes. “Industrialize the top-level assembly stage” and ensure sign-off convergence.
  • Large-Scale SoC: validate IPs from external vendors before integration, check UPF electrical consistency during its development, secure tape-outs schedule.
    Most errors found by Aniah OneCheck in large-scale SoC “should have been found by digital-centric tools” or “shouldn’t be allowed by the implementation flow”, but our experience has been that Aniah OneCheck detects serious errors every time on digital circuits.

Our customers get the best efficiency and quality of results when using our flow bottom-up, which is 100% seamless as all setup from IP and macros can be directly injected in the IC analysis.

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What keeps your customers up at night?
Based on public data from the Wilson research group study in 2020:

  • 68% of circuits require a redesign.
  • 85% of all circuits in production contain errors.

We help design teams avoid a most of these errors and relieve design engineers from the burden and stress of Silicon failures due to complex system assembly.

What does the competitive landscape look like and how do you differentiate?
Our #1 differentiation factor is coverage: customers who want the absolute best quality and detect errors in all types of circuitries love our solution.

Another differentiation factor is cost: some of our customers, who had spent more than 5 millions dollars on customization of standard EDA solutions over a decade, have been able to use our solution right out of the box – with the added value of superior productivity, thanks to a user interface purpose-build for the task.

A third key differentiator is runtime: with runtime in seconds for mixed-signal ICs, in minutes for billion-transistor SoC, our customers can go through all steps in the analysis, loop on errors fixes and set-up updates in less than a day.

Importantly, the scale of the IC has strictly no impact on coverage.

What new features/technology are you working on?
Our high-capacity, high-accuracy circuit analysis engine opens completely new possibilities, which we are very excited about:

  • Reliability modelling: provide a model of IC lifetime including oxide breakdown, EM and xBTI impact, with 2 key capacity: a. what-if analysis vs. mission profile and b. exhaustive detection of reliability hotspot to secure HTOL
  • IDDQ modelling across corner, temperature for test and industrialization engineers.
  • Virtual Lab for ISO 26262 standard for structural tests and functional safety

How do customers normally engage with your company? 
The most common entry process for our customers is “I’ve had a Silicon Bug – I don’t want that to happen ever again!”.

Our customers reach us through our sales network partners and in most cases, will engage in an evaluation. Aniah dedicates an AE engineer to each of our customers to ensure that OneCheck can be deployed throughout the design teams with the highest verification quality on all projects.

Our customers can purchase our solution for on-premises or SaaS deployment.

Also Read:

CEO Interview: Venkata Simhadri of MosChip

CEO Interview: Pat Brockett of Celera

CEO Interview: Islam Nashaat of Master Micro

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