Siemens EDA Acquires an IP Validation Tool for standard cells, IO and Hard IP

We’re living in an era of good growth for semiconductor design companies, and it’s no secret that each new SoC that comes along contains hundreds of IP blocks, so IP design re-use is just an accepted way of getting to market more quickly with lower risks. But how do we really know that all of the new IP is really correct? Like a famous president once said, “Trust, but verify.” In the EDA industry we have Fractal Technologies that has been successful in building up a business by offering a tool that lets engineers perform IP validation.

I spoke this month with Amit Gupta and Wei-Lii Tan of Siemens EDA about their recently announced acquisition of Fractal Technologies. Amit is famous for founding Solido Design Automation back in 2005, then getting acquired by Mentor Graphics in 2017; and they offered a set of EDA tools for design variation and ML characterization. I’ve met Amit at DAC several times over the years, and was always amazed that brute-force Monte Carlo SPICE simulations were now replaced by something much smarter and faster.

On SemiWiki our first blog on Fractal was back in April 2013, really, they’ve been around since 2010 and their CrossFire product is quite solid and unique in the marketplace. With the acquisition the product is renamed to Solido CrossCheck, which makes sense, as it’s now part of the Solido product group within Siemens EDA.

There were common customers already using both the Solido tools and Fractal, so the acquisition is complementary, and Gupta reports that the Fractal customers are quite happy to learn about the acquisition, as it means a long future for a trusted EDA tool. Over the years the engineers using Fractal tools would add their own IP checks, extending the robustness of checking, then send them to Fractal for possible inclusion to all users. That trend will continue.

Fractal tools work with industry standard file formats (views), and being part of Siemens EDA will continue that support for hundreds of checks.

• Verilog / VHDL (timing arcs)
• Schematic
• Liberty
• ECSM
• LEF
• GDSII
• CSS
• UPF

IP Validation

Who uses IP Validation? Both IP vendors and IP integrators, because each wants to know if all of their IP views are consistently defined. Both digital and analog IP can be run through the Solido CrossCheck tool.

Could you write your own scripts to validate IP? Yes, but it would take too many man-years of effort to come up with something approaching what Fractal has already done since 2010.

Perhaps in the future we could see Solido CrossCheck adding some ML capabilities, since the Solido engineering team has been applying ML for a decade now. Stay tuned. The bottom line is that your silicon design team really needs a tool that finds any IP errors before tape out.

Summary

In the EDA world there have been many acquisitions, and the most successful ones follow some simple maxims:

• Complementary technology
• Growing market segments
• Compatible management styles
• Common customers
• Allow the smaller company to innovate and grow
• Learn from each other
• Let the smaller company teach the bigger company AEs to become specialists
• Reward achievements

I’ve seen how well Mentor treated the people from Berkeley Design Automation, Solido and Tanner EDA, growing their business segments after acquisition, so I expect it will be the same with Fractal joining the Solido group in Siemens EDA. At DAC in December I will follow up and see how the Solido CrossCheck product and developers are doing.

Related Blogs

• The Official SemiWiki Virtual DAC 2020 Must See List!
• Fractal CEO Update 2020
• Why IP Designers Don’t Like Surprises!
• Response to IP’s Growing Impact On Yield And Reliability
• Early IP Block Error Detection is Critical!
• Crossfire Baseline Checks for Clean IP Part II