Sign up for a free webinar on December 11 on Accelerating Yield and Failure Analysis with Diagnosis.
The one hour presentation will be delivered via webcast by Geir Eide, Mentor’s foremost expert in yield learning. He will cover scan diagnosis, a software-based technique, that effectively identifies defects in digital logic and scan chains. as well as recent advancements in diagnosis technology and industrial case studies. There is time after the presentation for Q&A and further discussion.
Topics to be covered include:
- Best practices for data collection and diagnosis of digital semiconductor devices
- Statistical analysis of diagnosis results to pick the correct dies for an effective failure analysis
- Layout-aware diagnosis
- Scan chain diagnosis
- Correlating diagnosis and DFM analysis results
Who should attend:
- Engineers and managers responsible for digital semiconductor product design, test, quality, or yield
- Engineers and managers responsible for digital semiconductor product and technology advancement
- Failure Analysis Lab Managers or Process Engineers
- Engineers involved in manufacturing production or process development
- Anyone involved with the impact of low yield or low product quality
