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Synopsys on the Future of Custom Layout!

Synopsys on the Future of Custom Layout!
by Daniel Nenni on 01-18-2016 at 7:00 am

Analog and mixed signal design has received more than their fair share of attention since the mobile revolution and now that FinFETs are in production at the foundries I see that trend continuing. As a result this year there are some interesting things brewing in EDA, especially in the area of Custom Layout.

Innovation in Custom … Read More


Maybe not the world, but schedules got eaten

Maybe not the world, but schedules got eaten
by Don Dingee on 01-17-2016 at 4:00 pm

It has been almost five years since Marc Andreessen wrote the words, “Software is eating the world.” The premise of his essay in the Wall Street Journal in 2011 was pretty simple: the technology world has seen its intrinsic value shift from hardware to software. New all-software names have appeared on the list of high flying companies,… Read More


How Not To Be Incoherent

How Not To Be Incoherent
by Bernard Murphy on 01-01-2016 at 7:00 am

The advantage of working with cache memory is the great boost in performance you can get from working with a local high-speed copy of chunks of data from main memory. The downside is that you are messing with a copy; if another processor happens to be working in a similar area, there is a danger you can get out of sync when reading and writing… Read More


HDCP 2.2, Root of Trust, Industry’s First SHA-3 Security IP from Synopsys

HDCP 2.2, Root of Trust, Industry’s First SHA-3 Security IP from Synopsys
by Eric Esteve on 12-23-2015 at 7:00 am

Did you know that by 2020 90% of cars will be connected to Internet? Great, but today, there are already more than 100 car models affected with security flaws (Source: theguardian.com, 2015). That 320 apps are installed on average smartphone device? It would be a complete success, but 43% of Android devices allow installation of… Read More


3 flavors of TMR for FPGA protection

3 flavors of TMR for FPGA protection
by Don Dingee on 12-10-2015 at 4:00 pm

Back in the microprocessor stone age, government procurement agencies fell in love with the idea of radiation hardened parts that might survive catastrophic events. In those days, before rad-hard versions of PowerPC and SPARC arrived, there were few choices for processors in defense and space programs.

One of the first rad-hard… Read More


Advances in DDR IP Solution for High-Performance SoCs

Advances in DDR IP Solution for High-Performance SoCs
by Pawan Fangaria on 12-02-2015 at 7:00 am

In this era of high-performance, low-power, and low-cost devices coming up at an unprecedented scale, the SoCs can never attain the ultimate in performance; always there is scope for improvement. Several methods including innovative technology, multi-processor architecture, memory, data traffic management for low latency,… Read More


5 ways FPGA-based prototyping shrinks design time

5 ways FPGA-based prototyping shrinks design time
by Don Dingee on 12-01-2015 at 7:00 am

Engineers are trained to think linearly, along the lines of we started here, then we did this, and that, and this other stuff, and here is where we ended up. If you’ve ever presented in an internal review meeting, sales conference, or a TED-like event, you know that is a dangerous strategy in winning friends and influencing people.… Read More


How to Secure IoT Edge Device from Multiple Attacks?

How to Secure IoT Edge Device from Multiple Attacks?
by Eric Esteve on 11-21-2015 at 7:00 am

In the 1990’s, designing for performance was the main challenge and the marketing message for Intel processors was limited to the core frequency. Then designers had to optimize power consumption to target mobile phones/smartphone and build power efficient SoC, low power but high performance devices. Now in 2015 the semi industry… Read More


HiSilicon’s Experience with Synopsys ICC2

HiSilicon’s Experience with Synopsys ICC2
by Daniel Nenni on 11-11-2015 at 4:00 pm

At TSMC’s OIP Symposium last month, Zhe (Jared) Lui of HiSilicon presented their experiences with Synopsys’ ICC2 physical design suite.

Jared started by giving an overview of Huawei and HiSilicon. HiSilicon is the semiconductor arm of Huawei. I assume everyone knows who Huawei is. To a first approximation they … Read More


Perfecting the Great Verification Fugue

Perfecting the Great Verification Fugue
by Bernard Murphy on 11-03-2015 at 7:00 am

Michael Sanie (Senior Director Marketing in the Synopsys Verification Group) gave the wrap-up presentation at SpyGlass World recently, on the Synopsys Verification Direction. I learned from an interview Michael gave to Paul McLellan that he is an accomplished pianist. I’m a pianist also, though of considerably less talent,… Read More