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5 Talks on RISC-V

5 Talks on RISC-V
by Milos Tomic on 12-27-2021 at 6:00 am

Milos Tomic

Veriest recently hosted a webinar focusing on RISC-V as a forerunner of ongoing open-source revolution in chip design. Speakers were distinguished professionals from industry and academia. Webinar covered topics from market trends to open-source hardware initiatives, tools and methodologies.

Zvonimir Bandić: RISC-V Read More


“Too Big To Fail Two” – Could chip failure take down tech & entire economy?

“Too Big To Fail Two” – Could chip failure take down tech & entire economy?
by Robert Maire on 12-19-2021 at 6:00 am

Semiconductors too big to fail

-Chips enable tech sector which underpins entire economy
-Is the US chip sector “Too Big To Fail”?
-If US chip industry fails, does tech & everything else follow?
-How chip/Taiwan crisis compares to 2008 financial meltdown

It was the best of times, it was the worst of times

We find it an incredible juxtaposition… Read More


COVID Still Impacting Electronics

COVID Still Impacting Electronics
by Bill Jewell on 12-17-2021 at 6:00 am

Electronics Production 2020 2021

Electronics production has been volatile over the past two years primarily due to the COVID-19 pandemic. Electronics production three-month-average change versus a year ago is shown below for key Asian countries. COVID-19 shutdowns affected production in early 2020. Trends in 2021 show a strong bounce back.

The key trends Read More


Ramping Up Software Ideas for Hardware Design

Ramping Up Software Ideas for Hardware Design
by Bernard Murphy on 12-16-2021 at 6:00 am

Bridging chasm

This is a topic in which I have a lot of interest, covered in a panel at this year’s DAC; Raúl Camposano chaired the session. I had earlier covered a keynote by Moshe Zalcberg at Europe DVCon late in 2020; he now reprises the topic. Given the incredible pace of innovation and scale in software development these days, I don’t see what we… Read More


Top 10 Takeaways from DAC 2021

Top 10 Takeaways from DAC 2021
by Tom Dillinger on 12-15-2021 at 2:00 pm

stopped clock license model

The “in-person” portion of the Design Automation Conference (DAC) was recently held in San Francisco.  (As several presenters were unable to attend, a “virtual” program is also available.)  The presentations spanned a wide gamut – e.g., technical advanced in design automation algorithms;  new features in commercial EDA tools; … Read More


Semicon West is Semicon Less

Semicon West is Semicon Less
by Robert Maire on 12-15-2021 at 10:00 am

Semicon West 2021
  • Semicon West was Semicon Less- Less Customers & Vendor
  • Everyone is busy as can be, maybe too busy to attend
  • Those who were there, talk about supply chain issues & stress
  • How long does the party last & where the money comes from?

Semicon West was Semicon Less….

We attended a “Hybrid” version of Semicon… Read More


DAC 2021 – Accellera Panel all about Functional Safety Standards

DAC 2021 – Accellera Panel all about Functional Safety Standards
by Daniel Payne on 12-14-2021 at 10:00 am

FS data format min

Functional safety has been at the forefront of the electrification of our vehicles with new ADAS features, and the push to reach autonomous driving, while having compliance with the ISO 26262 functional safety standard. I attended the Accellera hosted panel discussion on Monday at DAC, hearing from functional safety panelists… Read More


Intel Discusses Scaling Innovations at IEDM

Intel Discusses Scaling Innovations at IEDM
by Scotten Jones on 12-14-2021 at 6:00 am

Intel at IEDM Slides Page 1

Standard Cell Scaling

Complex logic designs are built up from standard cells, in order to continue to scale logic we need to continually shrink the size of standard cells.

Figure 1 illustrates the dimensions of a standard cell.

 Figure 1. Standard Cell Dimensions.

 From figure 1 we can see that shrinking standard cell sizes requires… Read More


Webinar: The Backstory of PCIe 6.0 for HPC, From IP to Interconnect

Webinar: The Backstory of PCIe 6.0 for HPC, From IP to Interconnect
by Mike Gianfagna on 12-01-2021 at 8:00 am

The Backstory of PCIe 6.0 for HPC From IP to Interconnect

PCIe, or peripheral component interconnect express, is a very popular high-speed serial computer expansion bus standard. The width and speed the standard supports essentially defines the throughput for high-performance computing (HPC) applications.  The newest version, PCIe 6.0 promises to double the bandwidth that the… Read More


Silicon Catalyst Hosts an All-Star Panel December 8th to Discuss What Happens Next?

Silicon Catalyst Hosts an All-Star Panel December 8th to Discuss What Happens Next?
by Mike Gianfagna on 11-29-2021 at 6:00 am

Silicon Catalyst Hosts an All Star Panel December 8th to Discuss What Happens Next

Each year, Silicon Catalyst assembles a panel of industry luminaries to discuss important questions about the future. The charter of the Silicon Catalyst Industry Forum is to: “create a platform for broad-topic dialog among all stakeholders involved in the semiconductor industry value chain. The Forum topics focus on technicalRead More