Modern SoC design for artificial intelligence workloads has fundamentally shifted the role of the network-on-chip (NoC) from a simple connectivity fabric to a primary architectural determinant of system performance, power, and scalability. As compute density increases and heterogeneous accelerators proliferate, data… Read More
Podcast EP340: A Review of the Q4 2025 Electronic Design Market Data Report with Wally Rhines
Daniel is joined by Dr. Wally Rhines, CEO of Silvaco, to discuss the Electronic Design Market Data report that was just released. Wally is the industry coordinator for the EDA data collection program called EDMD. SEMI and the Electronic System Design Alliance collect data from almost all electronic design automation companies… Read More
Accellera Updates at DVCon 2026
Lu Dai (chair of Accellera) and I had our regular chat at DVCon U.S. 2026. Accellera also hosted a reception in the exhibits hall, with free snacks and drinks, very well attended. We talked about what’s new in Accellera, with a particular emphasis on the recently released standard for CDC and RDC tool interoperability, also Lu’s … Read More
Samtec’s Strong Presence at embedded world 2026
The embedded world Exhibition & Conference recently concluded. The event is held annually in Nuremberg, Germany and has become one of the most influential gatherings for the global embedded systems community. Since its inception in 2003, the event has grown from a modest technical meeting into a large-scale international… Read More
Silicon Catalyst and Microelectronics US 2026
The designation of Silicon Catalyst as the exclusive strategic partner for Microelectronics US 2026 represents a significant alignment between a leading semiconductor startup ecosystem and a rapidly growing U.S. microelectronics industry event. This partnership reflects broader trends in semiconductor innovation, … Read More
Alchip’s Leadership in ASIC Innovation: Advancing Toward 2nm Semiconductor Technology
Alchip Technologies has recently reported significant progress in the development of advanced 2nm ASICs, positioning itself as a leader in next-generation semiconductor design for AI and HPC. The announcement highlights Alchip’s efforts to commercialize cutting-edge chip technologies and deliver highly customized … Read More
CapEx Up for Foundry, Memory
Semiconductor Intelligence estimates total semiconductor industry capital spending (CapEx) was $166 billion in 2025, up 7% from 2024. We estimate 2026 CapEx will be $200 billion, up 20% from 2025. TSMC was the largest spender in 2024 with $40.9 billion in CapEx, 25% of the total. TSMC projects 2026 CapEx will be between $52 billion… Read More
Post-Silicon Validating an MMU. Innovation in Verification
Some post-silicon bugs are unavoidable, but we’re getting better at catching them before we ship. Here we look at a method based on a bare-metal exerciser to stress-test the MMU. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A)… Read More
GTC 2026: Agentic AI for Semiconductor Design and Manufacturing
Axiomise Introduces nocProve to Transform NoC Design Verification
Axiomise has recently launched a new verification tool called nocProve which will transform how Network-on-Chip designs are validated in modern hardware development, absolutely.
The tool is designed to be the first configurable formal verification application specifically created for NoC implementations. It addresses… Read More


TSMC CoPoS Versus Intel EMIB Semiconductor Packaging