On May 25, Huawei semiconductor chief He Tingbo unveiled LogicFolding, an architecture intended to advance chip performance without relying on ever-smaller transistors. Presented alongside Huawei’s “Tau Scaling Law,” the approach prioritizes signal speed over transistor dimensions. It is a genuine engineering response… Read More
Intel Diamond Rapids: Building Xeon Up, Out, and Through Silicon
Akhilesh Kumar & Krishnakanth Sistla, Intel
Diamond Rapids is Intel’s next-generation Xeon processor, designed around the proposition that hyperscale performance increasingly depends on moving, processing, and protecting data as efficiently as executing instructions. The architecture replaces the conventional… Read More
Intel Wildcat Lake: Right-Sizing Silicon Without Sinking Performance
Lance Hacking, Intel
Intel Core Series 3, code-named Wildcat Lake, is a mainstream client system-on-chip derived from the Panther Lake-based Core Ultra Series 3 architecture. Its design objective is not maximum feature density, but broad deployment of current-generation CPU, graphics, AI, memory, security, and connectivity… Read More
Hot Chips: Evolving Memory Architectures for Artificial Intelligence
Artificial intelligence performance is increasingly constrained by memory rather than arithmetic throughput. Scaling laws show that model quality improves when parameter count, training data, and compute grow together, but this balance fails when processors cannot obtain operands quickly enough. Contemporary accelerators… Read More
Podcast EP362: An atomic layer in compute. A discussion of what can be built as graphene photonics scales with Cedric Huyghebaert
Daniel is joined by Dr. Cedric Huyghebaert, CTO of Black Semiconductor. Cedric is one of the world’s leading experts in the development and integration of 2D materials, particularly graphene, into industrial semiconductor manufacturing. With a PhD in Physics from KU Leuven and over 25 years at imec, Cedric built and led… Read More
How TSMC Is Wiring the AI Era With Light
TSMC’s photonics strategy is centered on integrating optical input-output with advanced logic, rather than selling conventional optical transceivers as standalone products. The company is developing a silicon-photonics foundry platform and a packaging architecture called TSMC-COUPE, or Compact Universal Photonic … Read More
Intel Eyes a Memory Comeback as AI Rewrites Chip Economics
Intel is considering a return to memory technology decades after abandoning mainstream DRAM and, more recently, selling its NAND business. Chief executive Lip-Bu Tan has argued that memory should no longer be viewed simply as a low-margin commodity. Artificial intelligence is turning bandwidth, latency and data movement … Read More
The Twelve-Month Rule Does Not Describe a New Fab
By Nikhil Shah
Capital spending is often treated as if it becomes semiconductor capacity about twelve months later. That can be a useful rule for equipment installed in an existing fab. It is a poor description of a new fab built from the ground up.
I tested the distinction using five advanced-node projects in the United States where… Read More
The Fab Is Not the Finish Line
AI may close the design. The fab may finish the silicon. Production still has to realize the system.
Semiconductor engineering is becoming extraordinarily capable.
EDA platforms are expanding from individual design tasks toward increasingly complete system analysis.
Multiphysics simulation is connecting electrical, … Read More
PDF Solutions’ Exensio Was Built for Semiconductor Analytics. The New Exensio Aurora Architecture Is Built for Semiconductor Intelligence.
The semiconductor industry doesn’t have a shortage of data. It has a shortage of ways to turn that data into useful manufacturing insights quickly enough to matter.
That is the problem PDF Solutions’ Exensio solution has addressed for years. Built specifically for semiconductor manufacturing, Exensio brings … Read More


The Invisible Bottleneck Is Costing You Time You Can’t Get Back