Banner Electrical Verification The invisible bottleneck in IC design updated 1
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PLDA Expands Data Interconnect IP Solutions with CXL and Gen-Z Protocol Support

PLDA Expands Data Interconnect IP Solutions with CXL and Gen-Z Protocol Support
by Mike Gianfagna on 05-28-2020 at 10:00 am

Screen Shot 2020 05 07 at 7.06.36 PM

A couple of months ago I introduced PLDA, a new member of the SemiWiki community, with a post about PLDA’s switch IP and its support for PCIe and NVMe solid state disks. Working in the area of high-performance data interconnects requires support for a growing list of standards, standards that continually evolve. The trick is to stay… Read More


Design in the Time of COVID

Design in the Time of COVID
by Bernard Murphy on 05-26-2020 at 6:00 am

Fortune teller

There’s a lot of debate about how and when we are going to emerge from the worldwide economic downturn triggered by the pandemic. Everyone agrees we will emerge. This isn’t humanity’s first pandemic, nor will it be our last. But do we come out quickly or slowly? And what does the economy look like on the other side, particularly for … Read More


Talking Sense With Moortec…See No Evil!

Talking Sense With Moortec…See No Evil!
by Tim Penhale-Jones on 05-21-2020 at 10:00 am

see no evil monkey

In the first of this blog trilogy, Talking Sense with Moortec…’Are you listening’, I looked at not waiting for hindsight to be wise after the event, instead make use of what’s available and act ahead of time.

There’s a Japanese maxim, depicting three ‘wise’ monkeys… Kikazaru, Mizaru, and Iwazaru, better known as ‘hear no evil, … Read More


Collaboration Flow for Moore’s Law versus More than Moore

Collaboration Flow for Moore’s Law versus More than Moore
by Herb Reiter on 05-20-2020 at 10:00 am

Figure 1 Foundry

The current Coronavirus crisis is inflicting a lot of pain on people, companies, and governments. I hope I am not getting in trouble with my reasoning, but if you look closely, there are also some “positives” to the Covid-19 crisis.

– It is stress-testing our infrastructure and telling us where we need to improve – as country,… Read More


eFPGA – What’s Available Now, What’s Coming and What’s Possible!

eFPGA – What’s Available Now, What’s Coming and What’s Possible!
by Daniel Nenni on 05-20-2020 at 6:00 am

Flex Logix Inference Accelleration

eFPGA is now widely available, has been used in dozens of chips, is being designed into dozens more and it has an increasing list of benefits for a range of applications. Embedded FPGA, or eFPGA, enables your SoC to have flexibility in critical areas where algorithm, protocol or market needs are changing. FPGAs can also accelerate… Read More


3 Steps to a Security Plan

3 Steps to a Security Plan
by Bernard Murphy on 05-12-2020 at 12:00 am

cybersecurity

Assessing the security of a hardware design sometimes seems like a combination of the guy looking under a streetlight for his car keys, because that’s where the light is (We have this tool, let’s see what problems it can find) and a whack-a-mole response to the latest publicized vulnerabilities (Cache timing side channels? What… Read More


Flex Logix CEO Update 2020

Flex Logix CEO Update 2020
by Daniel Nenni on 05-08-2020 at 10:00 am

FlexLogic Color AI eFPGA

We started working with Felx Logix more than eight years ago and let me tell you it has been an interesting journey. Geoff Tate was our second CEO Interview so this is a follow up to that. The first one garnered more than 15,000 views and I expect more this time given the continued success of Flex Logix pioneering the eFPGA market, absolutely.… Read More


Ultra-Low Power Inference at the Extreme Edge

Ultra-Low Power Inference at the Extreme Edge
by Bernard Murphy on 05-07-2020 at 6:00 am

Intelligent IoT

I wrote last year about Eta Compute and their continuously tuned dynamic voltage-frequency scaling (CVFS). That piece was mostly about the how and why of the technology, that in self-timed circuits (a core technology for Eta Compute) it is possible to continuously vary voltage and frequency, whereas in conventional synchronous… Read More


Webinar: Build Your Next HBM2/2E Chip with SiFive

Webinar: Build Your Next HBM2/2E Chip with SiFive
by Mike Gianfagna on 05-04-2020 at 10:00 am

Screen Shot 2020 05 03 at 12.09.58 PM

I have been watching the trend for quite some time now that many advanced FinFET designs today are actually 2.5D systems in package. All of these 2.5D silicon interposer-based designs have high-bandwidth memory (HBM) stacks on board.  Often there are multiple memory stacks in both 4-high and 8-high configurations. If you follow… Read More


Talking Sense With Moortec…Are You Listening?!

Talking Sense With Moortec…Are You Listening?!
by Tim Penhale-Jones on 05-04-2020 at 10:00 am

Ear no evil

It almost doesn’t matter what your job may be, whether in the public sector or a private company, or how technical or how dangerous, many of life’s adages and sayings can be interpreted to have some direct meaning for all of us.

Over the years in our personal lives, we have been constantly advised that prevention is better than cure…certainly… Read More