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IP

Semiconductor Intellectual Property

Podcast EP54: Ventana Micro, RISC-V, HPC and Chiplets

Podcast EP54: Ventana Micro, RISC-V, HPC and Chiplets
by Daniel Nenni on 12-24-2021 at 10:00 am
Categories: IP, RISC-V
1 Comment

Dan is joined by Balaji Baktha, founder and CEO of Ventana Micro. Balaji explores the application of RISC-V in high-performance applications and the specific advantages of a chiplet-based approach.

RISC-V Summit Panel: https://www.youtube.com/watch?v=duZaAhWxhWM

The views, thoughts, and opinions expressed in these… Read More

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Bringing PCIe Gen 6 Devices to Market

Bringing PCIe Gen 6 Devices to Market
by Daniel Nenni on 12-20-2021 at 6:00 am
Categories: IP, Truechip

Truechip PCIe Gen 6

PCIe is a prevalent and popular interface standard that is used in just about every digital electronic system. It is used widely in SOCs and in devices that connect to them. Since it was first released in 2003, it has evolved to keep up with rapidly accelerating needs for high speed data transfers. Each version has doubled in throughput,… Read More

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PCIe 6.0, LPDDR5, HBM2E and HBM3 Speed Adapters to FPGA Prototyping Solutions

PCIe 6.0, LPDDR5, HBM2E and HBM3 Speed Adapters to FPGA Prototyping Solutions
by Kalar Rajendiran on 12-15-2021 at 6:00 am
Categories: Avery Design Systems, FPGA, IP, Prototyping, S2C EDA

Avery PCIe Speed Adapter IP at Work

We live in the age of big data. No matter how fast and complex modern SoCs are, it all comes down to how quickly data can get in and out that determines the system performance. And, there is a lot of data that today’s systems need to process. Naturally, system interfaces such as PCIe, DDR, HBM, etc., have been evolving rapidly too, to support… Read More

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Performance, Power and Area (PPA) Benefits Through Intelligent Clock Networks

Performance, Power and Area (PPA) Benefits Through Intelligent Clock Networks
by Kalar Rajendiran on 12-10-2021 at 10:00 am
Categories: Events, IP, Movellus

4 What is Maestro ICN

One of the sessions at the Linley Fall Processor Conference 2021 was the SoC Design session. With a horizontal focus, it included presentations of interest to a variety of different market applications. The talk by Mo Faisal, CEO of Movellus, caught my attention as it promises to solve a chronic issue relating to synchronizing … Read More

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Effectively Managing Large IP Portfolios For Complex SoC Projects

Effectively Managing Large IP Portfolios For Complex SoC Projects
by Kalar Rajendiran on 12-09-2021 at 6:00 am
Categories: EDA, IC Manage, IP

16 Make the IP Easy to Find

In today’s world, no IC design is completed without instantiating a few or many pre-verified or already proven intellectual property (IP) blocks. With break-neck pace at which chip designs are advancing, many IP blocks may even be entire chip designs from earlier product releases. Third-party IP market has been growing at a healthy… Read More

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RedCap Will Accelerate 5G for IoT

RedCap Will Accelerate 5G for IoT
by Bernard Murphy on 12-08-2021 at 6:00 am
Categories: AI, Automotive, Ceva, IoT, IP

5G 2021 min

You could be forgiven for wondering why I should push 5G when it might seem marketing is still ahead of deployment. While we may not all have it today, GlobeNewswire (September 22, 2021 12:30 ET) estimates there will be 700 million 5G connections across the world by the end of this year. That’s pretty rapid growth already, though still… Read More

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Enlisting Entropy to Generate Secure SoC Root Keys

Enlisting Entropy to Generate Secure SoC Root Keys
by Tom Simon on 12-06-2021 at 6:00 am
Categories: Intrinsic ID, IP, Security

NVM attacks

Most methods of securing SOCs involve storing a root key that provides the basis of all derived keys and encryption of communication. The weakness with these methods is that even if the root key is stored in secure non-volatile memory, there are often methods to read the key. Once a key has been divulged the device can be cloned and … Read More

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A Next-Generation Prototyping System for ASIC and Pre-Silicon Software Development

A Next-Generation Prototyping System for ASIC and Pre-Silicon Software Development
by Kalar Rajendiran on 12-05-2021 at 6:00 am
Categories: Corigine, EDA, Emulation, FPGA, IP, Prototyping

Corigine Prototyping Systems

Every now and then, disruptive technology is brought to market, challenging the way things have been done to that point. We are all familiar with many such technologies. The rhetorical question is, how many of us were aware, recognized and acknowledged those technologies before they became well established? For example, a startup… Read More

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CEO Interview: Da Chuang of Expedera

CEO Interview: Da Chuang of Expedera
by Daniel Nenni on 12-03-2021 at 6:00 am
Categories: AI, CEO Interviews, Expedera, IP

Da Chuang CEO Expedera

Da is co-founder and CEO of Expedera. Previously, he was cofounder and COO of Memoir Systems, an optimized memory IP startup, leading to a successful acquisition by Cisco. At Cisco, he led the Datacenter Switch ASICs for Nexus 3/9K, MDS, CSPG products. Da brings more than 25 years of ASIC experience at Cisco, Nvidia, and Abrizio.… Read More

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Low Power High Performance PCIe SerDes IP for Samsung Silicon

Low Power High Performance PCIe SerDes IP for Samsung Silicon
by Tom Simon on 12-02-2021 at 10:00 am
Categories: Analog Bits, Events, IP, Samsung Foundry

SerDes IP for PCIe

No matter how impressive the specifications are for an SoC, the power performance and area of the finished design all depend on the IP selected for the IO blocks. In particular, most SOCs designed for consumer and enterprise applications rely heavily on PCI Express. Because PCIe analog IP is critical to design success, Samsung … Read More