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Cadence To Acquire Tensilica

Cadence To Acquire Tensilica
by Paul McLellan on 03-11-2013 at 5:54 pm

You have probably already seen the news: Cadence is acquiring Tensilica for $380M. Cadence has been relatively late to the IP party compared to Synopsys. In contrast, Mentor was early, got into the IP business before it was really profitable and ended up shutting down the business.

Tensilica is quite sizable. It has over 200 licensees,… Read More


Qualcomm and Intel Dynasty Scenario at 14nm

Qualcomm and Intel Dynasty Scenario at 14nm
by Ed McKernan on 03-08-2013 at 1:00 pm

At a different time, but certainly within the past 12 months, Paul Otellini was asked if Intel would be a Foundry for Qualcomm. His reply was that it did not leave a good taste in his mouth. Nevertheless it was not rejected and the door that remained open just a crack is likely to swing open for Qualcomm, the premier mobile silicon supplier… Read More


Multiprotocol 10G-KR and PCIe Gen-3 PHY IP will support big data and smartphone explosion

Multiprotocol 10G-KR and PCIe Gen-3 PHY IP will support big data and smartphone explosion
by Eric Esteve on 03-07-2013 at 7:47 am

We have frequently said in Semiwiki how crucial is it for the SC industry to benefit from high quality PHY IP… even if, from a pure business point of view (MBA minded), PHY IP business does not look so attractive. In fact, to be able to design on-the-edge SerDes and PLL (the two key pieces), you need to build and maintain a highly skilled… Read More


OTP based Analog Trimming and Calibration

OTP based Analog Trimming and Calibration
by Eric Esteve on 03-01-2013 at 10:16 am

Embedded NVM technology based functions can be implemented in large SoC designed in advanced technology nodes down to 28nm, as there is no requirement for extra mask levels, like when integrating Nand Flash, negatively impacting the final cost. And it is also possible to integrate One Time Programmable (OTP) to store trim and … Read More


MUST: DSP ready solution for tomorrow smartphone based on CEVA-XC 4000

MUST: DSP ready solution for tomorrow smartphone based on CEVA-XC 4000
by Eric Esteve on 02-24-2013 at 5:13 am

Like Guiness dark beer, competition is good for you! I mean good for end user, as it pushes DSP IP supplier to provide ever better solution. I am not talking about me-to type of competition, like that we have seen in the past with IBM trying to displace TI at Nokia, by offering a LEAD (DSP IP core from TI used in every NOKIA wireless phone… Read More


Modeling TSV, IBIS-AMI and SERDES with HSPICE

Modeling TSV, IBIS-AMI and SERDES with HSPICE
by Daniel Payne on 02-21-2013 at 8:10 pm

The HSPICE circuit simulator has been around for decades and is widely used by IC designers worldwide, so I watched the HSPICE SIG by video today and summarize what happened. Engineers from Micron, Altera and AMD presented on how they are using HSPICE to model TSVs, IBiS-AMI models and SERDES, respectively.… Read More


Innovative or Die, NoC IP Market is Cruel…

Innovative or Die, NoC IP Market is Cruel…
by Eric Esteve on 02-21-2013 at 8:14 am

I have blogged in 2011 about the Arteris-Sonics case, initiated by Sonics, claiming that Arteris NoC IP product was infringing Sonics patent. In this article, we have seen that the architecture of Sonics interconnects IP product was not only older but also different from Arteris’ NoC architecture: the products launched initially… Read More


ISSCC 2013: Circuit Design Using FinFETs!

ISSCC 2013: Circuit Design Using FinFETs!
by Daniel Nenni on 02-16-2013 at 8:00 pm


One of the privilages of blogging for SemiWiki is invitations to the top conferences around the world including the International Solid-State Circuits Conference (ISSCC) in San Francisco this week. Amazing, this conference is older than I am:

ISSCC 2013 is the 60th Conference in an incredibly long-lasting series. FollowingRead More


Patenting in the (Resistive Memory) Material World

Patenting in the (Resistive Memory) Material World
by Christie Marrian on 02-14-2013 at 8:10 pm

(with apologies to George Harrison) Two recent Blogs over at ReRAM-Forum.com have focused on the latest in the IP field, particularly as it affects resistive memory. A high level overview of who is patenting what suggests a healthy amount of R&D is going on in the field. But looking a little deeper suggests there is much overlap… Read More


Developing ARM v8 Code…Today

Developing ARM v8 Code…Today
by Paul McLellan on 02-13-2013 at 12:50 pm

You are going to be developing software for an SoC that contains an ARM Cortex-A57 64-bit CPU. Or perhaps it is an SoC containing ARM’s hybrid big.LITTLE multi-core architecture that combines one or more low power cores with some high power, high performance cores to get the best of both worlds: high throughput when it is needed… Read More