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S2C: Empowering Smarter Futures with Arm-Based Solutions

S2C: Empowering Smarter Futures with Arm-Based Solutions
by Daniel Nenni on 03-07-2025 at 8:00 am

S2c EDA ARM 2025

The tech world is sprinting toward a future where your fridge orders groceries, your car avoids traffic before you hit it, and security cameras don’t just watch—they understand. But behind these innovations lies a messy truth: building the brains for these smart systems is complicated.

Fresh off the 2024 Arm Tech Symposia… Read More


Synopsys Expands Hardware-Assisted Verification Portfolio to Address Growing Chip Complexity

Synopsys Expands Hardware-Assisted Verification Portfolio to Address Growing Chip Complexity
by Kalar Rajendiran on 02-25-2025 at 6:00 am

Synopsys HAV Product Family

Last week, Synopsys announced an expansion of their Hardware-Assisted Verification (HAV) portfolio to accelerate semiconductor design innovations. These advancements are designed to meet the increasing demands of semiconductor complexity, enabling faster and more efficient verification across software and hardware… Read More


Innexis Product Suite: Driving Shift Left in IC Design and Systems Development

Innexis Product Suite: Driving Shift Left in IC Design and Systems Development
by Kalar Rajendiran on 12-03-2024 at 6:00 am

Full Spectrum Development Inexis Developer Pro

At the heart of the shift-left strategy is the goal of moving traditionally late-stage tasks—such as software development, validation, and optimization—earlier in the design process. This proactive approach allows teams to identify and resolve issues before they escalate, reducing costly rework and shortening the overall… Read More


The RISC-V and Open-Source Functional Verification Challenge

The RISC-V and Open-Source Functional Verification Challenge
by Daniel Nenni on 10-24-2024 at 10:00 am

Semiwiki Blog Post #1 Image #1

Most of the RISC-V action at the end of June was at the RISC-V Summit Europe, but not all. In fact, a group of well-informed and opinionated experts took over the Pavilion stage at the Design Automation Conference to discuss functional verification challenges for RISC-V and open-source IP.

Technology Journalist Ron Wilson and … Read More


Evolution of Prototyping in EDA

Evolution of Prototyping in EDA
by Daniel Nenni on 07-18-2024 at 6:00 am

Picture I

As AI and 5G technologies burgeon, the rise of interconnected devices is reshaping everyday life and driving innovation across industries. This rapid evolution accelerates the transformation of the chip industry, placing higher demands on SoC design. Moore’s Law indicates that while chip sizes shrink, the number of… Read More


LIVE WEBINAR Maximizing SoC Energy Efficiency: The Role of Realistic Workloads and Massively Parallel Power Analysis

LIVE WEBINAR Maximizing SoC Energy Efficiency: The Role of Realistic Workloads and Massively Parallel Power Analysis
by Daniel Nenni on 07-03-2024 at 2:00 pm

The Role of Realistic Workloads and Massively Parallel Power Analysis

As the complexity of modern System-on-Chip (SoC) designs continues to rise, achieving energy efficiency measured as performance per watt has become a crucial design goal. With the increasing demand for powerful, multifunctional chips, balancing performance with power consumption has become essential. Realistic workloads… Read More


S2C Prototyping Solutions at the 2024 Design Automation Conference

S2C Prototyping Solutions at the 2024 Design Automation Conference
by Daniel Nenni on 06-17-2024 at 10:00 am

DAC 2024 Banner

As the Design Automation Conference (DAC) approaches, anticipation builds for what promises to be an exceptional event in San Francisco. Attendees can look forward to perfect weather and a plethora of activities beyond the conference, such as sailing on the bay and exploring the city’s iconic landmarks.

Since its inception… Read More


Reduce Risk, Ensure Compliance: Hardware-Assisted Verification for Design Certification

Reduce Risk, Ensure Compliance: Hardware-Assisted Verification for Design Certification
by Lauro Rizzatti on 06-12-2024 at 10:00 am

Reduce risk ensure compliance Figure 1
Prologue

Peter was running late for two reasons. First, he encountered unexpected heavy traffic and arrived ten minutes late for a crucial meeting with a customer to run a compliance test of his new 6G phone design prototyped on FPGAs. This prototype’s success was pivotal, as it could secure a significant purchase order.Read More


Accelerate SoC Design: Addressing Modern Prototyping Challenges with S2C’s Comprehensive Solutions (II)

Accelerate SoC Design: Addressing Modern Prototyping Challenges with S2C’s Comprehensive Solutions (II)
by Daniel Nenni on 06-07-2024 at 8:00 am

Prodigy

In the fast-paced world of Electronic Design Automation (EDA), the complexity of chip designs is continuously rising. With the burgeoning of systems such as 5G communication devices and Advanced Driver-Assistance Systems (ADAS) teeming with thousands of components, the demand for robust and efficient prototyping platforms… Read More


Anirudh Fireside Chats with Jensen and Cristiano

Anirudh Fireside Chats with Jensen and Cristiano
by Bernard Murphy on 05-14-2024 at 6:00 am

Fireside chat min

At CadenceLIVE 2024 Anirudh Devgan (President and CEO of Cadence) hosted two fireside chats, one with Jensen Huang (President and CEO of NVIDIA) and one with Cristiano Amon (President and CEO of Qualcomm). As you would expect both discussions were engaging and enlightening. What follows are my takeaways from those chats.

Anirudh

Read More