hip webinar automating integration workflow 800x100 (1)
WP_Term Object
(
    [term_id] => 36
    [name] => eFPGA
    [slug] => efpga
    [term_group] => 0
    [term_taxonomy_id] => 36
    [taxonomy] => category
    [description] => 
    [parent] => 0
    [count] => 133
    [filter] => raw
    [cat_ID] => 36
    [category_count] => 133
    [category_description] => 
    [cat_name] => eFPGA
    [category_nicename] => efpga
    [category_parent] => 0
    [is_post] => 
)
eFPGA
Posted on

Neural Network Efficiency with Embedded FPGA’s

Neural Network Efficiency with Embedded FPGA’s
by Tom Dillinger on 09-21-2018 at 12:00 pm
Categories: eFPGA, Flex Logix, FPGA, IP

The traditional metrics for evaluating IP are performance, power, and area, commonly abbreviated as PPA. Viewed independently, PPA measures can be difficult to assess. As an example, design constraints that are purely based on performance, without concern for the associated power dissipation and circuit area, are increasingly… Read More

Posted on

An FPGA Industry Veteran’s View of Future

An FPGA Industry Veteran’s View of Future
by Tom Simon on 08-29-2018 at 7:00 am
Categories: Achronix, eFPGA, FPGA
1 Comment

There are tectonic changes happening in the world of FPGAs. A lot has changed since their introduction in the 80’s. Back then they were mostly used to implement state machines or glue logic. Subsequently they grew more complex with the addition of high speed IOs, eRAM, DSPs, other processors and other IP. More recently though FPGAs… Read More

Posted on

Timing Closure Techniques for SOCs with Embedded FPGA Fabric

Timing Closure Techniques for SOCs with Embedded FPGA Fabric
by Tom Simon on 08-07-2018 at 12:00 pm
Categories: Achronix, eFPGA, FPGA

Once the benefits of using an embedded FPGA fabric are understood, the next question is about how timing closure is handled between the ASIC and the eFPGA blocks. First let’s look briefly at the advantages. By moving the eFPGA on to the SOC die, tons of I/O logic and the need for any package and board interconnect will vanish. Package… Read More

Posted on

Machine Learning and Embedded FPGA IP

Machine Learning and Embedded FPGA IP
by Tom Dillinger on 07-18-2018 at 12:00 pm
Categories: eFPGA, Flex Logix, FPGA, IP

Machine learning-based applications have become prevalent across consumer, medical, and automotive markets. Still, the underlying architecture(s) and implementations are evolving rapidly, to best fit the throughput, latency, and power efficiency requirements of an ever increasing application space. Although ML is … Read More

Posted on

Know what 5G is? You’re probably wrong

Know what 5G is? You’re probably wrong
by Tom Simon on 07-12-2018 at 12:00 pm
Categories: 5G, Achronix, Automotive, eFPGA, FPGA, IoT, Mobile

If you think the transition to 5G will be anything like the transitions before it to 3G or 4G, you are in for a big surprise. Not only will the transition take longer than either of the previous transitions, its ramifications will spread far beyond cell phones and into other areas such as automobiles, AI, healthcare, and commerce. … Read More

Posted on

When Why and How Should You Use Embedded FPGA Technology

When Why and How Should You Use Embedded FPGA Technology
by Alok Sanghavi on 06-27-2018 at 7:00 am
Categories: Achronix, eFPGA, FPGA

If integrating an embedded FPGA (eFPGA) into your ASIC or SoC design strikes you as odd, it shouldn’t. ICs have been absorbing almost every component on a circuit board for decades, starting with transistors, resistors, and capacitors — then progressing to gates, ALUs, microprocessors, and memories. FPGAs are simply one more… Read More

Posted on

Block RAM integration for an Embedded FPGA

Block RAM integration for an Embedded FPGA
by Tom Dillinger on 05-22-2018 at 12:00 pm
Categories: eFPGA, Flex Logix, FPGA, IP
2 Comments

The upcoming Design Automation Conference in San Francisco includes a very interesting session –“Has the Time for Embedded FPGA Come at Last?” Periodically, I’ve been having coffee with the team at Flex Logix, to get their perspective on this very question – specifically, to learn about the key features that customers are seeking… Read More

Posted on

Hard IP for an embedded FPGA

Hard IP for an embedded FPGA
by Tom Dillinger on 04-30-2018 at 12:00 pm
Categories: eFPGA, Flex Logix, FPGA, IP
1 Comment

As Moore’s Law enables increased integration, the diversity of functionality in SoC designs has grown. Design teams are seeking to utilize outside technical expertise in key functional areas, and to accelerate their productivity by re-using existing designs that others have developed. The Intellectual Property (IP) industry… Read More

Posted on

Achronix Momentum Building with Revenue Growth, Product/Staff Expansion, New HQ

Achronix Momentum Building with Revenue Growth, Product/Staff Expansion, New HQ
by Camille Kokozaki on 04-27-2018 at 7:00 am
Categories: Achronix, eFPGA, FPGA

5G Wireless, Network Acceleration, Data centers, Machine Learning, Compression, Encryption fueling the Growth

Building on its increasing momentum, Achronix Semiconductor Corporation held a ribbon-cutting ceremony on Tuesday, April 25, with the presence of Santa Clara’s Mayor Lisa Gillmor, customers, and partners, employees… Read More