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New Concepts in Semiconductor IP Lifecycle Management

New Concepts in Semiconductor IP Lifecycle Management
by Daniel Nenni on 06-27-2017 at 7:00 am

Right before #54DAC I participated in a webinar with Methodics on “New Concepts in Semiconductor IP Lifecycle Management” with Simon Butler, CEO of Methodics, Michael Munsey, Vice President of Business Development and Strategic Accounts, and Vishal Moondhra, Vice President of Applications. Thewebinar introducedRead More


Webinar -New Concepts in Semiconductor IP Lifecycle Management

Webinar -New Concepts in Semiconductor IP Lifecycle Management
by Daniel Payne on 05-26-2017 at 7:00 am

The semiconductor IP market continues growing at a healthy rate, and IP reuse is a staple of all modern SoC designs. Along with the acceptance of IP reuse comes a host of growing challenges, like:

  • Increase in design files
  • Increase in meta-data
  • More links between design members worldwide
  • More links between data in multiple engineering
Read More

Achieving Requirements Traceability from Concept through Design and Test

Achieving Requirements Traceability from Concept through Design and Test
by Daniel Payne on 05-09-2017 at 12:00 pm

Excel is a wonderful, general purpose spreadsheet tool that lets me organize and analyze rows and columns of data into something meaningful, however it doesn’t know anything about requirements traceability for complex semiconductor projects. So why do so many engineering teams still rely upon Excel or custom, in-house… Read More


CTO Interview: Peter Theunis of Methodics

CTO Interview: Peter Theunis of Methodics
by Daniel Nenni on 02-06-2017 at 7:00 am

Fascinated by computers at a very young age, Peter got his degree in Computer Science and was brought to the Bay Area via AIESEC Berkeley’s student exchange program to write his thesis. He has now more than 15 years of professional experience in software engineering, large scale systems architecture and data center engineering… Read More


SoC Integration using IP Lifecycle Management Methodology

SoC Integration using IP Lifecycle Management Methodology
by Daniel Payne on 01-27-2017 at 12:00 pm

Small EDA companies often focus on a single point tool and then gradually over time they add new, complementary tools to start creating more of a sub-flow to help you get that next SoC project out on time. The most astute EDA companies often choose to partner with other like-minded companies to create tools that work together well,… Read More


IC Design Management: Build or Buy?

IC Design Management: Build or Buy?
by Daniel Payne on 11-17-2016 at 12:00 pm

When I first started doing circuit design with Intel at the transistor level back in the late 1970’s we had exactly two EDA tools at our disposal: an internally developed SPICE circuit simulator, and a commercial IC layout system. Over the years at Intel the internal CAD group added many more automation tools: gate level simulator,… Read More


CEO Interview: Simon Butler of Methodics

CEO Interview: Simon Butler of Methodics
by Daniel Nenni on 10-24-2016 at 7:00 am

It has been interesting to watch Methodics transform from an EDA company with their VersIC design management product to Life Cycle Management with ProjectIC, and now a Systems Company with WarpStor. Methodics was founded in 2006 by 2 ex-Cadence experts in the Custom IC design tools space, Simon Butler and Fergus Slorach. Today… Read More


Requirements Management and IP Management Working Together

Requirements Management and IP Management Working Together
by Daniel Payne on 09-12-2016 at 12:00 pm

I first heard about requirements management back in 1995 while marketing a graphic HDL entry tool for an EDA vendor, and it sounded like a very useful automation approach, however our team quickly discovered that there were too many different vendors for requirements management, so there could be no simple way to integrate with… Read More


5 Reasons Why Platform Based Design Can Help Your Next SoC

5 Reasons Why Platform Based Design Can Help Your Next SoC
by Daniel Payne on 07-14-2016 at 12:00 pm

Semiconductor design IP and verification IP have been around for decades, but just because your company has lots of IP doesn’t mean that you’re getting all of the benefits of a design reuse methodology. Maybe your business has encountered some of the following issues:

Read More

Go Native – With Methodics at DAC in Austin

Go Native – With Methodics at DAC in Austin
by Tom Simon on 06-01-2016 at 7:00 am

DAC is often a yearly reflection point for the companies that exhibit and attend. For the innovators it is an opportunity to look back and see a year of progress and development. Fortunately, this is the case for Methodics, which has had a strong year both in terms of business and technical development. Though, we easily see how these… Read More