Webinar DFT 2025 banner mar11 (1)
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Mapping SysML to Hardware Architecture

Mapping SysML to Hardware Architecture
by Daniel Payne on 04-03-2023 at 10:00 am

SysML to VisualSim, Media App min

The Systems Modeling Language (SysML) is used by systems engineers that want to specify, analyze, design, verify and validate a specific system. SysML started out as an open-source project, and it’s a subset of the Unified Modeling Language (UML). Mirabilis Design has a tool called VisualSim Architect that imports your… Read More


Full-Stack, AI-driven EDA Suite for Chipmakers

Full-Stack, AI-driven EDA Suite for Chipmakers
by Kalar Rajendiran on 04-03-2023 at 6:00 am

Synopsys.ai Industry First AI driven Full EDA Suite

Semiconductor technology is among the most complex of technologies and the semiconductor industry is among the most demanding of industries. Yet the ecosystem has delivered incredible advances over the last six decades from which the world has benefitted tremendously. Yes, of course, the markets want that break-neck speed… Read More


Securing Memory Interfaces

Securing Memory Interfaces
by Kalar Rajendiran on 03-30-2023 at 10:00 am

synopsys secure ddr controller with ime

News of hackers breaking into systems is becoming common place these days. While many of the breaches reported to date may have been due to security flaws in software, vulnerabilities exist in hardware too. As a result, the topic of security is getting increased attention within the semiconductor industry around system-on-chip… Read More


Advanced electro-thermal simulation sees deeper inside chips

Advanced electro-thermal simulation sees deeper inside chips
by Don Dingee on 03-29-2023 at 6:00 am

Advanced electro-thermal simulation in Keysight PathWave ADS

Heat and semiconductor reliability exist in an inversely proportional relationship. Before the breaking point at the thermal junction temperature rating, every 10°C rise in steady-state temperature cuts predicted MOSFET life in half. Yet, heat densities rise as devices plunge into harsher environments like smartphones,… Read More


Speculation for Simulation. Innovation in Verification

Speculation for Simulation. Innovation in Verification
by Bernard Murphy on 03-28-2023 at 6:00 am

Innovation New

This is an interesting idea, using hardware-supported speculative parallelism to accelerate simulation, with a twist requiring custom hardware. Paul Cunningham (Senior VP/GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on… Read More


Power Delivery Network Analysis in DRAM Design

Power Delivery Network Analysis in DRAM Design
by Daniel Payne on 03-27-2023 at 10:00 am

IR drop plot min

My IC design career started out with DRAM design back in 1978, so I’ve kept an eye on the developments in this area of memory design to note the design challenges, process updates and innovations along the way. Synopsys hosted a memory technology symposium in November 2022, and I had a chance to watch a presentation from SK hynix… Read More


Siemens Keynote Stresses Global Priorities

Siemens Keynote Stresses Global Priorities
by Bernard Murphy on 03-27-2023 at 6:00 am

Space Perspective

Dirk Didascalou, Siemens CTO, gave a keynote at DVCon, raising our perspective on why we do what we do. Yes, our work in semiconductor design enables the cloud and 5G and smart everything, but these technologies push progress for a select few. What about the big global concerns that affect us all: carbon, climate, COVID and conflict?… Read More


Developing the Lowest Power IoT Devices with Russell Mohn

Developing the Lowest Power IoT Devices with Russell Mohn
by Daniel Nenni on 03-24-2023 at 6:00 am

InPlay NanoBeacon Technology

Russell Mohnis the Co-Founder and Director of RF/AMS Design at InPlay Inc. and his team has been using WiCkeD from MunEDA for several years. We thought the rest of the world would like to learn about his experiences.

How did you get started in semiconductors and what brought you to InPlay?
I was initially drawn to analog and mixed-signal… Read More


Webinar: Enhance Productivity with Machine Learning in the Analog Front-End Design Flow

Webinar: Enhance Productivity with Machine Learning in the Analog Front-End Design Flow
by Daniel Payne on 03-23-2023 at 6:00 am

analog Circuit Optimization

Analog IC designers can spend way too much time and effort re-using old, familiar, manual iteration methods for circuit design, just because that’s the way it’s always been done. Circuit optimization is an EDA approach that can automatically size all the transistors in a cell, by running SPICE simulations across… Read More


Intel Keynote on Formal a Mind-Stretcher

Intel Keynote on Formal a Mind-Stretcher
by Bernard Murphy on 03-22-2023 at 6:00 am

Intellectual understanding min

Synopsys has posted on the SolvNet site a fascinating talk given by Dr. Theo Drane of Intel Graphics. The topic is datapath equivalency checking. Might sound like just another Synopsys VC Formal DPV endorsement but you should watch it anyway. This is a mind-expanding discussion on the uses of and considerations in formal which … Read More