Join us on May 31, 2012 for the first in a series of conversations exploring concepts and best practices for emerging companies. The first conversation will outline the critical milestones which must be conquered to take a start-up from early stages to a strong, growing, sustainable… Read More
Electronic Design Automation
"Mechanics of Creativity" at DAC 2012: Oxymoron?
A perennial DAC highlight for me is the panel session sponsored by Women in Electronic Design. This year, it is called “The Mechanics of Creativity: What does it take to be an idea machine?”
Is this an oxymoron?
I interviewed panelist Dee McCrorey , Chief Risk Guru and Innovation Catalyst at Risktaking for Success LLC, to find out.… Read More
The Carbon Decade
Carbon Design Systems celebrates its 10th anniversary this month. It is a celebration that the company has survived a decade but also bittersweet that the company hasn’t been acquired for a juicy premium. But we just have to accept that EDA is not a business where you can throw together a company in 18 months and sell it for $1B… Read More
Changing your IC Layout Methodology to Manage Layout Dependent Effects (LDE)
Smaller IC nodes bring new challenges to the art of IC layout for AMS designs, like Layout Dependent Effects (LDE). If your custom IC design flow looks like the diagram below then you’re in for many time-consuming iterations because where you place each transistor will impact the actual Vt and Idsat values, which are now a … Read More
Soft Error Rate (SER) Prediction Software for IC Design
My first IC design in 1978 was a 16Kb DRAM chip at Intel and our researchers discovered the strange failure of Soft Errors caused by Alpha particles in the packaging and neutron particles which are more prominent at higher altitudes like in Denver, Colorado. Before today if you wanted to know the Soft Error Rate (SER) you had to fabricate… Read More
Atrenta’s Spring Cleaning Deal
Atrenta is having a special offer to let you “spring clean” your IP for free. They are providing two weeks of free access to the Atrenta IP kit starting from today, April 16th, until the end of May. During this period, qualified design groups in the US will be able to use the kit for two consecutive weeks to “spring… Read More
High Yield and Performance – How to Assure?
In today’s era, high performance mobile devices are asserting their place in every gizmos we play with and guess what enables them work efficiently behind the scene – it’s large chunks of memory with low power and high speed, packed as dense as possible. Ever growing requirement of power, performance and area led us to process nodes… Read More
Chip in the Clouds – "Gathering"
Cloud computing is the talk of the tech world nowadays. I even hear commentaries about how entrepreneurs are turned down by venture capitalists for not including a cloud component into their business plan no matter what the core business may be. The commentary goes “It’s cloudy without any clouds.” Add some clouds to your strategy… Read More
I Love DAC
For the fourth year Atrenta, Cadence and Springsoft are jointly sponsoring the “I LOVE DAC” campaign. In case you have been hibernating all winter, DAC is June 3-7th in San Francisco at the Moscone Center.
There are two parts to “I LOVE DAC”. First, if you register by May 15th (and they haven’t all… Read More
EDPS: 3D ICs, part II
Part I is here.
In the panel session at EDPS on 3D IC a number of major issues got highlighted (highlit?).
The first is the problem of known-good-die (KDG) which is what killed off the promising multi-chip-module approach, perhaps the earliest type of interposer. The KDG problem is that with a single die in a package it doesn’t… Read More
Podcast EP267: The Broad Impact Weebit Nano’s ReRAM is having with Coby Hanoch