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Design Verification Challenges: Past, Present and Future!

Design Verification Challenges: Past, Present and Future!
by Daniel Nenni on 02-26-2016 at 7:00 am

Next week I will be at DVCON which is not to be confused with DEFCON the community of black and white hat hackers that challenge our online privacy on a daily basis. DVCON is the premier conference for the functional design and verification of our beloved electronic devices. The big draw next week of course is the keynote by Dr. Walden… Read More


Mentor ARM subscription signals ecosystem shift

Mentor ARM subscription signals ecosystem shift
by Don Dingee on 02-25-2016 at 4:00 pm

Since creating the landmark “all-you-can-eat” license with Samsung in 2002, ARM has inked several subscription deals with chipmakers and EDA firms. The latest ARM subscriber license deal just announced is for Mentor Graphics. What makes their strategy unique?… Read More


Sustainability, Semiconductor Companies and Software Companies

Sustainability, Semiconductor Companies and Software Companies
by Daniel Payne on 02-25-2016 at 12:00 pm

I certainly want to leave the Earth a better place to live for my children and generations to come, so sustainability is a value that resonates with me. How is a consumer like me to know which companies are the most sustainable in areas that matter, like:… Read More


Neural Networks Ready for Embedded Platforms

Neural Networks Ready for Embedded Platforms
by Tom Simon on 02-24-2016 at 7:00 am

If you are not yet familiar with the term Convolutional Neural Networks, or CNN for short, you are certainly bound to become in the year ahead. Using Artificial Intelligence in the form of CNN is on the verge of replacing a large number of computing tasks, especially those involving recognizing things such as sounds, shapes, objects,… Read More


S2C opens up FPGA prototyping for PCIe fabrics

S2C opens up FPGA prototyping for PCIe fabrics
by Don Dingee on 02-23-2016 at 4:00 pm

Reconfigurable computing began with FPGA cards dropped into expansion slots in workstations. FPGA-based prototyping vendors tended away from that model as interconnect speeds rose and cabling complexity between modules increased. Much faster PCIe interfacing and bigger FPGAs mean revisiting the concept.… Read More


Synopsys at DVCon 2016

Synopsys at DVCon 2016
by Bernard Murphy on 02-23-2016 at 12:00 pm

It’s that time of year again – DVCon starts on Monday Feb 29[SUP]th[/SUP] and as always should be a packed event. Synopsys plans a big showing, in the exhibit hall, in a sponsored lunch, at tutorials and in papers. Time to get your conference shoes on and go check them out – I plan to be there all week.

One of the most obvious things you will… Read More


A Brief History of Open-Silicon

A Brief History of Open-Silicon
by Tom Simon on 02-22-2016 at 12:00 pm

In 2003, when Open-Silicon was founded there was a growing need for flexible and innovative ways of getting chip designs manufactured. Semiconductor companies, given the alternatives of COT or traditional ASIC, often were looking for more flexibility without the huge investment and risk of going COT. Let’s look at how Open-Silicon… Read More


Advanced Micro Device’s New Polaris FinFET-Based Architecture Could Open New Doors

Advanced Micro Device’s New Polaris FinFET-Based Architecture Could Open New Doors
by Patrick Moorhead on 02-21-2016 at 4:00 pm

It seems of late like there is an unlimited thirst for GPU performance at the right power efficiency. Whether it is deep learning, object recognition, artificial intelligence, simulations, VR or AR, the industry desperately needs GPU improvements. Many within the graphics industry would agree that a new era of graphics performance… Read More


FinFETs, Power Integrity and Chip/Package Co-design

FinFETs, Power Integrity and Chip/Package Co-design
by Bernard Murphy on 02-18-2016 at 7:00 am

FinFETs have brought a lot of good things to design – higher performance, higher density and lower leakage power – promising to extend Moore’s law for a least a while longer. But inevitably with new advances come new challenges, especially around optimizing for power integrity in these designs.

One of these challenges is… Read More


The (not so) Easy Life of an SOC Design Integrator

The (not so) Easy Life of an SOC Design Integrator
by Tom Simon on 02-16-2016 at 3:00 pm

How can large SOC projects effectively integrate sub blocks and IP into a stable version for release or internal development? The person responsible for integrating SOC sub blocks into a validated configuration for release has a difficult task. Usually there are many sub-blocks, each undergoing their own development. There… Read More