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WEBINAR REPLAY: ClioSoft Facilitates Design Reuse with Cadence® Virtuoso®

WEBINAR REPLAY: ClioSoft Facilitates Design Reuse with Cadence® Virtuoso®
by Daniel Nenni on 10-23-2019 at 10:00 am

In September, ClioSoft gave a SemiWiki webinar titled, Reusing Your IPs & PDKs Successfully With Cadence® Virtuoso®. I was happy to be the moderator of this webinar, having had the chance to work with ClioSoft’s team over many years. The webinar was informative while also being very time efficient. I think it is important for… Read More


Statistically speaking you probably care about On-chip Variation

Statistically speaking you probably care about On-chip Variation
by admin on 10-22-2019 at 10:00 am

There are some metaphorical similarities between reaching timing signoff and driving a car to your destination. Most of us get in the car, turn the key and push the gas pedal to make it go. While we might have a cursory understanding of what makes it go, there are actually a lot of “moving part” under the hood in each instance. For most… Read More


WEBINAR: PAVE360 Validating Autonomous Vehicle Behavior

WEBINAR: PAVE360 Validating Autonomous Vehicle Behavior
by Daniel Nenni on 10-21-2019 at 6:00 am

Siemens Mentor recently announced PAVE360™, a very cool comprehensive pre silicon simulation environment. Autonomous cars are very popular here in Silicon Valley and quite safe on the highways since the average speed is 25mph (horrible traffic). In the city you need autonomous parking unless you want to waste precious time … Read More


The New Silvaco CEO is SURGING!

The New Silvaco CEO is SURGING!
by Daniel Nenni on 10-18-2019 at 6:00 am

One of my great pleasures in the semiconductor industry is meeting the people who have brought us to where we are today, at the forefront of modern life. One of those people is Babak Taheri, now CEO of Silvaco who I spent time with yesterday. Babak started in semiconductors around the same time I did 30+ years ago. He has a PhD in EECS and… Read More


Virtualizing 5G Infrastructure Verification

Virtualizing 5G Infrastructure Verification
by Bernard Murphy on 10-17-2019 at 5:00 am

5G backhaul, midhaul, fronthaul

Mentor have pushed the advantages of virtualized verification in a number of domains, initially in verifying advanced networking devices supporting multiple protocols and software-defined networking (SDN), and more recently for SSD controllers, particularly in large storage systems for data centers. There are two important… Read More


Optimizing High Performance Packages calls for Multidisciplinary 3D Modeling

Optimizing High Performance Packages calls for Multidisciplinary 3D Modeling
by Tom Simon on 10-16-2019 at 10:00 am

For all the time we spend thinking and talking about silicon design, it’s easy to forget just how important package design is. Semiconductor packages have evolved over the years from very basic containers for ICs into very specialized and highly engineered elements of finished electronic systems. They play an important role … Read More


Automating Timing Arc Prediction for AMS IP using ML

Automating Timing Arc Prediction for AMS IP using ML
by Daniel Payne on 10-16-2019 at 6:00 am

Empyrean, Qualib-AI flow

NVIDIA designs some of the most complex chips for GPU and AI applications these days, with SoCs exceeding 21 billion transistors. They certainly know how to push the limits of all EDA tools, and they have a strong motivation to automate more manual tasks in order to quicken their time to market. I missed their Designer/IP Track Poster… Read More


Cadence and Green Hills Share More Security Thoughts at ARM Techcon

Cadence and Green Hills Share More Security Thoughts at ARM Techcon
by Randy Smith on 10-15-2019 at 10:00 am

On Wednesday, October 9, 2019, I had the pleasure of spending the day at ARM Techcon at the San Jose Convention Center. In the morning, in addition to getting some sneak peeks into the exhibitor area, I attended some of the morning keynote presentations, which focused on artificial intelligence (AI) and machine learning (ML) topics.… Read More


Formal in the Field: Users are Getting More Sophisticated

Formal in the Field: Users are Getting More Sophisticated
by Bernard Murphy on 10-15-2019 at 5:00 am

Formal SIG 2019 meeting at Synopsys

Building on an old chestnut, if sufficiently advanced technology looks like magic, there are a number of technology users who are increasingly looking like magicians. Of course when it comes to formal, neither is magical, just very clever. The technology continues to advance and so do the users in their application of those methods.… Read More


Response to IP’s Growing Impact On Yield And Reliability

Response to IP’s Growing Impact On Yield And Reliability
by Daniel Nenni on 10-14-2019 at 6:00 am

One of the reasons I founded SemiWiki nine years ago was the lack of EDA, IP and Foundry content in the media. The problem is that unless you work in the industry it is very difficult to write about it in competent technical detail. Most media outlets only know what vendors tell them which is how the semiconductor industry worked before… Read More