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Electronic Design Automation
Anyone who frequents SemiWiki will likely know Moore’s Law. The prediction made by Gordon Moore over 50 years ago regarding the relentless increase in transistor density and reduction in cost has tracked well for a very, very long time. In recent years, there has been spirited discussion about the end of Moore’s Law. This is a discussion… Read More
Hands down, without a doubt, the most interesting CEO in semiconductors is Lip-Bu Tan, founder of Walden Capitol and current CEO of Cadence Design Systems. If you want to talk about a man with a plan it’s Lip-Bu Tan.
Before we get into the fireside chat between Tom Caufield and Lip-Bu at the GTC 2020 Virtual event let’s do a quick biography:… Read More
Covering configurable systems is a challenge. What’s a good strategy to pick a small subset of settings and still get high confidence in coverage? Paul Cunningham (GM, Verification at Cadence), Jim Hogan and I continue our series on research ideas, here an idea from software testing which should also apply to hardware. Feel free… Read More
MIPI may have started out as a standard for mobile phones, but it has become very important for connecting cameras and displays in a wide range of other things such as cameras, computers, drones, VR glasses, IoT devices and cars. Along the way it has matured by adding important features to support new applications. Now when we talk… Read More
The semiconductor industry is fiercely competitive. This is widely known by the SemiWiki community. When it comes to critical design parameters such as power, performance or area you’re either in the envelope that defines the market or you’re not a player. Yield management has a similar impact. Those who can stay ahead of the yield… Read More
In the early days of Atrenta I met with Ralph Marlett, a distinguished test expert with many years of experience at Zuken and Recal Redac. He talked me into believing we could do meaningful static analysis for DFT-friendliness at RTL. His work with us really opened my eyes to the challenges that test groups face in integrating their… Read More
Though hopefully not some of us all of the time. Randomization is a technique used in verification to improve coverage in testing. You develop tests you know you have to run, then you throw randomization on top of that to search around those starter tests, to explore possibilities you haven’t considered. Truly random tests are not… Read More
In July, I explored the benefits of the new Cadence Tempus™ Power Integrity Solution. In that piece, I explored some of the unique capabilities of this new tool with Brandon Bautz, senior product management group director and Hitendra Divecha, product management director in the Digital & Signoff Group at Cadence. I recently… Read More
In July, I covered a webinar that described how yieldHUB helps bring a new product to market. That webinar described how to implement new production introduction (NPI) using an array of tools and techniques that should be part of any semiconductor enterprise. In a recent article published by yieldHUB, they took a few steps back … Read More
Synopsys virtual events are high on my list for three reasons:
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Intel’s Pearl Harbor Moment