Modern system-on-chip (SoC) and application-specific integrated circuit (ASIC) designs are extraordinarily complex. They may combine processors, accelerators, memory controllers, high-speed interfaces, security functions, and millions—or even billions—of logic gates. Verifying these systems entirely through … Read More
Electronic Design Automation
From Custom Silicon to AI Systems: Why Cross-Layer Engineering Matters
The central argument of Ankur Gupta’s AI Infra Summit keynote is simple but consequential: the next leap in AI infrastructure will not come from improving chips, servers, cooling systems, or data centers independently. It will come from optimizing the connections among them. Siemens frames this as a journey “from custom silicon… Read More
The Intelligence Revolution: TSMC’s OIP Ecosystem Forges the Path to Trillion-Transistor AI Systems
At the 2026 OIP Ecosystem Forum, the industry narrative shifted from incremental scaling to what TSMC defines as the “Intelligence Revolution.” Akin to the 18th-century Industrial Revolution which transitioned human physical labor to mechanical power, the current era is augmenting human ingenuity through … Read More
Agentic AI Is Reshaping Semiconductor Design
Artificial intelligence is moving rapidly from an experimental aid to a foundational part of semiconductor engineering. In a recent industry talk, leaders from ChipAgents and Analog Devices described how agentic AI could help chipmakers manage soaring design complexity, accelerate product development, and improve the … Read More
Podcast EP367: How Keysight is Accelerating RF and Microwave Design with Matthew Ozalas
Daniel is joined by Matthew Ozalas from Keysight. With an experience of more than 20 years, Matthew brings a plethora of knowledge in complex RF designs using CAD tools. Matthew has also authored several application notes on RF and Microwave design and development using Keysight ADS with his recent ones based on “Artificial … Read More
The Invisible Bottleneck Is Costing You Time You Can’t Get Back
By Joel Jorgensen, FlowAccel.
The 2026 Siemens EDA and Wilson Research Group study just came out. Verification now eats close to half the schedule on every IC and FPGA program. I don’t doubt that number. What I don’t know is how much of it is actually verification, and how much of it is something else showing up disguised… Read More
Podcast EP366: How Cognichip is Changing Chip Design with Faraj Aalaei
Daniel is joined by the CEO of Cognichip, Faraj Aalaei, a successful visionary entrepreneur with over 40 years of distinguished experience in communications and networking technologies. As a leading entrepreneur in Silicon Valley, he was responsible for building and leading two semiconductor companies through IPOs as a founder… Read More
Semiconductor Engineering Has a State-Continuity Problem
Product realization depends not only on reaching the next engineering state, but on preserving the relationships between states from intent through qualification, release, and lifecycle learning.
Semiconductor development is usually described as a sequence of activities: architecture, design, fabrication, packaging,… Read More
Podcast EP365: How Agentrys is Revolutionizing Chip Design with Mark Ren
Daniel is joined by Mark Ren, founder and CEO of Agentrys. Mark has 26 years of EDA and AI R&D experience spanning IBM Research and NVIDIA Research, driving design automation innovations that power modern chip design. He received the IBM Corporate Award for contributions to the design closure for high-performance microprocessors.… Read More
Webinar – Avestra Explains How to Achieve Assertion Driven Silicon Success
Studies have shown that nearly 20% of the verification cycle is spent on assertion generation, debugging, and methodology integration. This work remains largely manual today or is delegated to general-purpose LLMs that can produce incorrect assertions more than 30% of the time. Avestra attacks this problem with agentic AI … Read More


Why ASML Is Racing to Build 110 EUV Machines