SiC 800 2026ChipletSummit Static (1)
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LUBIS EDA: Addressing the Verification Bottleneck in Modern Chip Design

LUBIS EDA: Addressing the Verification Bottleneck in Modern Chip Design
by Daniel Nenni on 02-19-2026 at 6:00 am

RISC V Verification Diagram Lubis EDA

LUBIS EDA is a Germany-based EDA company that specializes in formal verification, a mathematically rigorous method for proving that a chip design behaves correctly under all possible conditions. Founded in 2021 by a team of researchers and engineers from the academic world, the company has rapidly become a notable innovator… Read More


Smarter IC Layout Parasitic Analysis

Smarter IC Layout Parasitic Analysis
by Daniel Payne on 02-18-2026 at 10:00 am

ParagonX flow

IC layout parasitics dominate the performance of custom digital, analog and mixed-signal designs, so the challenge becomes how to identify the root causes and to quantify the effects of parasitics during early design stages. The old method of iterating between layout, extraction, SPICE simulation, followed by manual debug… Read More


Accelerating Static ESD Simulation for Full-Chip and Multi-Die Designs with Synopsys PathFinder-SC

Accelerating Static ESD Simulation for Full-Chip and Multi-Die Designs with Synopsys PathFinder-SC
by Kalar Rajendiran on 02-17-2026 at 10:00 am

SNPS PathFinder SC ESD Verification

As analog and mixed-signal designs become increasingly complex, parasitic effects dominate both design time and cost, consuming 30–50% of engineers’ effort in debugging and reanalyzing circuits. Addressing these multiphysics effects requires early verification strategies and reliable simulation solutions. Modern … Read More


On the high-speed digital design frontier with Keysight’s Hee-Soo Lee

On the high-speed digital design frontier with Keysight’s Hee-Soo Lee
by Don Dingee on 02-16-2026 at 10:00 am

Chiplet 3D Interconnect Designer reduces interconnect analysis in high-speed digital design from weeks to minutes

High-speed digital (HSD) design is one of the more exciting areas in EDA right now, with design practices, tools, and workflows evolving to keep pace with increasing design complexity. With the annual Chiplet Summit and DesignCon festivities right around the corner, we sat down with Keysight’s Hee-Soo Lee, HSD Segment Lead, … Read More


Bronco Debug Stress Tested Measures Up

Bronco Debug Stress Tested Measures Up
by Bernard Murphy on 02-16-2026 at 6:00 am

Automated debugger

I wrote last year about a company called Bronco, offering an agentic approach to one of the hottest areas in verification – root-cause debug. I find Bronco especially interesting because their approach to agentic is different than most. Still based on LLMs of course but emphasizing playbooks of DV wisdom for knowledge capture … Read More


TSMC and Cadence Strengthen Partnership to Enable Next-Generation AI and HPC Silicon

TSMC and Cadence Strengthen Partnership to Enable Next-Generation AI and HPC Silicon
by Daniel Nenni on 02-15-2026 at 6:00 pm

TSMC WAFER

TSMC continues to reinforce its leadership in advanced semiconductor manufacturing through its deepening collaboration with Cadence Design Systems. The expanded partnership focuses on enabling next-generation artificial intelligence and high-performance computing innovations by aligning advanced electronic design… Read More


Giving AI Agents Access to a Compiled Design and Verification Database

Giving AI Agents Access to a Compiled Design and Verification Database
by Tom Anderson on 02-12-2026 at 8:00 am

SemiWiki Snapshot

A few weeks ago, I had the chance to work with AMIQ EDA as they introduced a new product: DVT MCP Server. I was quite intrigued by the role it will play in AI-assisted chip design and verification, so I wanted to learn more. I spoke with Gabriel Busuioc, the AI Assistant team leader at AMIQ EDA, to understand more about the product and how… Read More


Why PDF Solutions Is Positioning Itself at the Center of the Semiconductor Ecosystem

Why PDF Solutions Is Positioning Itself at the Center of the Semiconductor Ecosystem
by Kalar Rajendiran on 02-10-2026 at 6:00 am

PDF Solutions Thank You

The semiconductor industry is on track to exceed one trillion dollars in annual revenue by the end of the decade, propelled by AI, advanced computing, and edge applications. Yet beneath this growth lies a structural shift. Manufacturing complexity is rising faster than the industry’s ability to manage it. As architectures move… Read More


CEO Interview with Dr. Raj Gautam Dutta of Silicon Assurance

CEO Interview with Dr. Raj Gautam Dutta of Silicon Assurance
by Daniel Nenni on 02-08-2026 at 12:00 pm

Dr. Raj Gautam Dutta


Dr. Raj Gautam Dutta is the Co-Founder and Chief Executive Officer of Silicon Assurance, where he defines the company’s strategic direction and leads its technology and product vision. He is responsible for driving the development of differentiated hardware security solutions, executing growth and partnership strategies,… Read More


Podcast EP330: An Overview of DVCon U.S. 2026 with Xiaolin Chen

Podcast EP330: An Overview of DVCon U.S. 2026 with Xiaolin Chen
by Daniel Nenni on 02-06-2026 at 10:00 am

Daniel is joined by Xiaolin Chen, Senior Director of Technical Product Management for Formal Solutions at Synopsys. She has over 20 years of experience applying formal technology in verification and partnering with customers to identify opportunities where formal methods are best suited to solve complex verification challenges.… Read More