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Electronic Design Automation
Daniel is joined by the CEO of Cognichip, Faraj Aalaei, a successful visionary entrepreneur with over 40 years of distinguished experience in communications and networking technologies. As a leading entrepreneur in Silicon Valley, he was responsible for building and leading two semiconductor companies through IPOs as a founder… Read More
Product realization depends not only on reaching the next engineering state, but on preserving the relationships between states from intent through qualification, release, and lifecycle learning.
Semiconductor development is usually described as a sequence of activities: architecture, design, fabrication, packaging,… Read More
Daniel is joined by Mark Ren, founder and CEO of Agentrys. Mark has 26 years of EDA and AI R&D experience spanning IBM Research and NVIDIA Research, driving design automation innovations that power modern chip design. He received the IBM Corporate Award for contributions to the design closure for high-performance microprocessors.… Read More
Studies have shown that nearly 20% of the verification cycle is spent on assertion generation, debugging, and methodology integration. This work remains largely manual today or is delegated to general-purpose LLMs that can produce incorrect assertions more than 30% of the time. Avestra attacks this problem with agentic AI … Read More
The semiconductor industry is entering a period in which manufacturing leadership will depend not simply on producing more data, but on turning that data into timely, trustworthy decisions. PDF Solutions CONNECT 2026 is designed around this challenge. Taking place October 15–16 at the Westin St. Francis in San Francisco, the… Read More
We all know timing closure is one of the most challenging processes in chip design. Extracting actionable insight from massive timing reports, tracing violations back to RTL, and selecting the right fix across complex PPA tradeoffs all require deep expertise. And every change can trigger hours or days of tool runs and cross-team… Read More
On the last day of #DAC2026 I stopped by the Keysight booth to chat with Nilesh Kamdar, GM of EDA Business to get an update. He has spent 27 years in the industry, and this made 25 DAC trips for him. For Keysight the application areas of focus are serving designers of high frequency and high-speed digital, RF, and mm/uwave designs. An … Read More
On Tuesday at #DAC2026 I attended the exhibitor presentation, Synopsys: How Silicon Startups are Addressing the AI Memory Gap. Vikram Bhatia from Synopsys introduced the two presentations from Wenbo Yin, SVP of IC Design at TetraMem and R. Scott Hills, VP of Business Development at ANAFLASH. Datacenters consume large amounts… Read More
AI can compress the path to tape-out. The next challenge is compressing physical realization.
Something important is beginning to happen in semiconductor development: the design cycle itself is becoming compressible.
AI-assisted engineering can accelerate architecture exploration, RTL development, verification, physical… Read More
Daniel is joined by Dr. Germain Fenger, Senior Director of Product Management at Synopsys where he leads advanced mask solutions and computational lithography technologies. With a background spanning semiconductor manufacturing, lithography research, engineering, and product leadership, Germain has held roles at imec,… Read More
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A Study of Photoresist Bake Influence on Stochastics for DUV Immersion Lithography