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Electronic Design Automation
At the heart of the shift-left strategy is the goal of moving traditionally late-stage tasks—such as software development, validation, and optimization—earlier in the design process. This proactive approach allows teams to identify and resolve issues before they escalate, reducing costly rework and shortening the overall… Read More
RISC-V cores are popping up everywhere. The growth of this open instruction set architecture (ISA) was quite evident at the recent RISC-V summit. You can check out some of the RISC-V buzz on SemiWiki here. While all this is quite exciting and encouraging, there are hurdles to face before true prime-time, ubiquitous application… Read More
3D-IC design can be both exciting and frustrating. It’s exciting because it opens a new world of innovation possibilities – opportunities that aren’t constrained by the rules of monolithic chip scaling. It can be frustrating because of the large array of complex technical challenges that must be overcome to make this new paradigm… Read More
Modern simulators map logic designs into software to compile for native execution on target hardware. Can this compile step be further optimized? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas.… Read More
Cadence recently launched a webinar series on trends and challenges in automotive design. They contribute through IP from their Silicon Solutions Group, a comprehensive spectrum of design tooling and through collaborative development within a wide partner ecosystem. This collaboration aims to support and advance progress… Read More
An animated panel discussion Design Automation Conference in June offered up a view of the state of RISC-V and open-source functional verification and a wealth of good material for a three-part blog post series.
Parts One and Two covered a range of topics from microcontroller versus more general-purpose processor versus running… Read More
The Impact of AI on Software and Hardware Development
Part 4 of this series analyzes how AI algorithmic processing is transforming software structures and significantly modifying processing hardware. It explores the marginalization of the traditional CPU architecture and demonstrates how software is increasingly dominating… Read More
You begin writing some UVM code and there are parts of the code that aren’t done yet, so you begin to use uvm_objection, guarding that code. Rich Edelman, a product engineer at Siemens doing verification debug and analysis, wrote a paper on this topic, which I just read. This blog covers the topic of objections and provides some different… Read More
Designers choosing gallium nitride (GaN) transistors may face a surprising challenge when putting the devices in their context. While the Advanced SPICE Model for GaN HEMTs (ASM-HEMT) model captures many behaviors like thermal and trapping effects, it grapples with accuracy over a wide range of bias conditions. Foundries … Read More
My first job out of college was migrating a DRAM chip from one process node to a newer node, and it was a 100% manual process that required many months of effort. That need to migrate semiconductor IP to newer nodes is still with us today, and much automation has been applied to digital circuits, however migrating analog IP has proven… Read More
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