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Electronic Design Automation
Before EDA becomes AI-native, focused agents have a window to prove measurable engineering value inside existing design flows.
AI is entering semiconductor engineering from several directions at once.
Some companies are building broad agentic design environments. Others are attacking specific bottlenecks: timing closure,… Read More
Daniel is joined by Kimon W. Michaels, a prominent figure in the semiconductor industry, currently serving as the Executive Vice President of Products and Solutions at PDF Solutions, Inc. He co-founded the company and has held various leadership roles, including Vice President of Design for Manufacturability since June 2007.… Read More
The TSMC OIP Ecosystem Forum highlighted many accomplishments across TSMC’s vast ecosystem. Specific achievements with TSMC as well as collaborative work across several companies were all on display.
And there was an exhibit area where you could meet the companies behind many of these stories and learn more about them.… Read More
Wow, OpenAI and Synopsys just announced a multiyear partnership to develop GPT-Synopsys, a specialized artificial intelligence model for semiconductor design. The agreement combines OpenAI’s frontier models with Synopsys’ electronic design automation software and engineering expertise. Its ambition is to help engineers… Read More
Can quantum computing have any relevance to EDA? This month’s paper suggests it might have a role someday, in accelerating one of the most fundamental of EDA algorithms: SAT. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A)… Read More
As chipmakers put more computing power into a single system, the challenge extends beyond making individual chips faster. They must connect multiple chips, memory stacks, power supplies, and sometimes optical components in a compact package. In the2026 TSMC OIP Forum talk “Addressing Inter-Die Complexity for 3D Multi-Die… Read More
Next-gen AI accelerators, high-performance processors, and complex computing architectures depend heavily on advanced packaging. Bringing multiple dies, chiplets, high-bandwidth memory, and advanced interconnects together into a single 2.5D or 3D package yields massive performance gains. However, this design evolution… Read More
Siemens and TSMC are expanding their collaboration on semiconductor design tools, with a focus on AI assisted workflows, advanced chip packaging and support for newer manufacturing processes. Their announcement centers on an AI agent intended to find and fix design rule violations: errors that can prevent a chip layout from… Read More
Agentic AI is beginning to move semiconductor engineering beyond copilots and isolated task automation.
From Agentrys’ public material and recent discussion, its architecture points toward a broader engineering flow:
Specification → RTL → verification → synthesis / physical design → PPA optimization → physical verification… Read More
By Piyush Bag
Intro: In this AI era, building data centers has become crucial not just for hyperscalers, but for many companies as well, as they build the infrastructure for AI. At a high level, a data center includes compute, storage, networking, and other infrastructure. This article is about the design lifecycle of network hardware.… Read More
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Intel Foundry: AI performance now depends on the whole system