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DAC 2026 Mach42: A new generation of physics-driven AI models for analog circuit verification

DAC 2026 Mach42: A new generation of physics-driven AI models for analog circuit verification
by Daniel Nenni on 07-14-2026 at 10:00 am

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Mach42 spun out of the Department of Physics at the University of Oxford in 2019 with a mission to establish software tools capable of drastically accelerating expensive physics simulations while supporting complex computational workflows. The prototype tools were successfully applied in the emulation of extreme states … Read More


Synopsys at Design Automation Conference 2026

Synopsys at Design Automation Conference 2026
by Daniel Nenni on 07-14-2026 at 6:00 am

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Synopsys is catalyzing the era of pervasive intelligence with comprehensive engineering solutions spanning silicon design, IP, and simulation and analysis. At this year’s Design Automation Conference (DAC), the company will showcase innovations transforming silicon and systems development for a wide range of applications… Read More


Enabling AI to Understand Complex Runtime Behavior for Accurate, Automated Root Cause Analysis — DAC 2026

Enabling AI to Understand Complex Runtime Behavior for Accurate, Automated Root Cause Analysis — DAC 2026
by Daniel Nenni on 07-13-2026 at 6:00 am

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Undo gives AI coding agents the runtime context they need to solve hard problems in complex software and system verification workflows Undo’s technology records complete program execution, allowing engineers and AI coding agents to understand exactly what happened during execution rather than inferring behavior from source… Read More


Podcast EP354: How Siemens EDA is Conquering New Lithography Challenges with Sagar Saxena

Podcast EP354: How Siemens EDA is Conquering New Lithography Challenges with Sagar Saxena
by Daniel Nenni on 07-10-2026 at 2:00 pm

Daniel is joined by Sagar Saxena, Senior Product Engineer at Siemens EDA specializing in computational lithography, optical proximity correction (OPC), and advanced patterning solutions for leading-edge semiconductor manufacturing. Sagar has led the development and deployment of advanced OPC technologies, including… Read More


CEO Interview with Mark Ren of Agentrys

CEO Interview with Mark Ren of Agentrys
by Daniel Nenni on 07-10-2026 at 10:00 am

Mark Ren Agentrys AI

Mark Ren has 26 years of EDA and AI R&D experience spanning IBM Research and NVIDIA Research, driving design automation innovations that power modern chip design. He received the IBM Corporate Award for contributions to the design closure for high-performance microprocessors. At NVIDIA, he helped establish the company

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SemiAnalysis EDA Market Primer – Market Dynamics, Cadence, Synopsys, Siemens, China EDA Rise

SemiAnalysis EDA Market Primer – Market Dynamics, Cadence, Synopsys, Siemens, China EDA Rise
by Daniel Nenni on 07-09-2026 at 10:00 am

EDA Industry Primer SemiAnalysis

Electronic Design Automation, or EDA, is the software infrastructure that transforms a hardware specification into a manufacturable integrated circuit. At advanced process nodes, the problem is no longer simply drawing transistors or connecting gates. A modern system-on-chip contains billions of standard cells, hundreds… Read More


Beyond Workflow Agents: Toward Design Intelligence in Analog EDA

Beyond Workflow Agents: Toward Design Intelligence in Analog EDA
by ChandraM on 07-09-2026 at 6:00 am

ChandraM LongPost AgenticStack

Over the last year, the EDA industry has started using a new vocabulary: agents, super agents, mental models, native skills, playbooks, RAG, MCP, autonomous workflows, and AI-first design.

The language is new, but the motivation is familiar to anyone who has worked in chip design.

Design complexity keeps increasing. The number… Read More


MooresLabAI at DAC 2026: Why the Future of Semiconductor Engineering Is Agentic, Not Just Generative

MooresLabAI at DAC 2026: Why the Future of Semiconductor Engineering Is Agentic, Not Just Generative
by Daniel Nenni on 07-08-2026 at 2:00 pm

DAC MLAI BuildingTheFuture

For decades, semiconductor innovation has been constrained not by imagination, but by engineering capacity. While transistor density has continued to advance, the process of building chips has remained fundamentally manual, fragmented across specifications, RTL, verification, debugging, coverage analysis, and signoff.… Read More


IP Lifecycle Management in the AI Era

IP Lifecycle Management in the AI Era
by Bernard Murphy on 07-08-2026 at 6:00 am

designer trying to find best IP options in a tangle of choices

Large design enterprises have multiple concurrent activities around IP of various types: software/firmware, blocks defined in RTL or HLS, verification IPs of multiple different types, physical implementations, scripts/files for timing, power management, etc., etc. Each of these continues to evolve and branch to serve … Read More


See Autonomous Chip Design in Action with ChipAgents at DAC 2026

See Autonomous Chip Design in Action with ChipAgents at DAC 2026
by Daniel Nenni on 07-07-2026 at 2:00 pm

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Making the AI wave at DAC 2026 in Long Beach

DAC comes to Long Beach for the first time in 2026, with artificial intelligence expected to be one of the central topics across the conference program and exhibition floor.

For semiconductor design and verification teams, the discussion has moved beyond whether AI can assist engineers.… Read More