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EDA

Electronic Design Automation

Podcast EP364: The Broad Impact of Advanced Mask Solutions, Today and Tomorrow with Dr. Germain Fenger

Podcast EP364: The Broad Impact of Advanced Mask Solutions, Today and Tomorrow with Dr. Germain Fenger
by Daniel Nenni on 09-04-2026 at 10:00 am
Categories: EDA, Synopsys

Daniel is joined by Dr. Germain Fenger, Senior Director of Product Management at Synopsys where he leads advanced mask solutions and computational lithography technologies. With a background spanning semiconductor manufacturing, lithography research, engineering, and product leadership, Germain has held roles at imec,… Read More

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The $9.5 Billion Design IP Market: Shifting Boundaries, Arm’s Monopoly, and the RISC-V Response

The $9.5 Billion Design IP Market: Shifting Boundaries, Arm’s Monopoly, and the RISC-V Response
by Kalar Rajendiran on 09-04-2026 at 6:00 am
Categories: AI, Arm, IP, IPnest, RISC-V, Semiconductor, Semiconductor Intelligence, Semiconductor Services, SiFive, Synopsys

2025 Design IP Sub Categories Market Share Pie Chart

While semiconductor design intellectual property (IP) is a $9.45 billion market, it acts as the absolute architectural bottleneck for the entire global semiconductor value chain. The choices made at the IP layer today dictate the cost, power, and security of a downstream technology economy rapidly marching toward a trillion… Read More

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Technical Case Study: MicroLED Yield Management with Plessey and yieldWerx

Technical Case Study: MicroLED Yield Management with Plessey and yieldWerx
by Daniel Nenni on 09-03-2026 at 2:00 pm
Categories: EDA, yieldWerx

Technical Case Study MicroLED Yield Management at Plessey

Plessey Semiconductors manufactures monolithic MicroLED displays for near-eye augmented-reality systems, where pixel pitch, brightness, uniformity, and defect density directly determine usable yield. Its process integrates device design, epitaxy, wafer fabrication, bonding, and production in one facility. The displays… Read More

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Unified Emulation and Prototyping: Pipedream or Reality?

Unified Emulation and Prototyping: Pipedream or Reality?
by Lauro Rizzatti on 09-03-2026 at 10:00 am
Categories: EDA, Emulation, FPGA, Synopsys

Unified Emulation and Prototyping Pipedream or Reality Figure 1

Preamble
Hardware-assisted verification (HAV) platforms, including hardware emulators and FPGA-based prototyping systems, are the two dominant methodologies for validating long workloads on complex System-on-Chip (SoC) designs before tape-out. HAV sits within a broader continuum of verification engines: simulation… Read More

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DAC 2026: A Discussion of Who Owns the Intelligence Behind Tomorrow’s Chips and How to Make it Better

DAC 2026: A Discussion of Who Owns the Intelligence Behind Tomorrow’s Chips and How to Make it Better
by Mike Gianfagna on 09-02-2026 at 6:00 am
Categories: AI, Alphacore, Analog Bits, Arteris, EDA, Events, Keysight EDA, llmda.ai, Siemens EDA

DAC 2026 A Discussion of Who Owns the Intelligence Behind Tomorrow’s Chips and How to Make it Better

The industry is moving from simple documentation chatbots to agentic workflows capable of performing complex, multi-step tasks like design creation, verification, and library characterization. These agents are intended to enhance engineering productivity by roughly 50%. A panel of industry experts met at DAC to discuss… Read More

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How Agentic AI Turns IC Engineers into Architects

How Agentic AI Turns IC Engineers into Architects
by Daniel Nenni on 09-01-2026 at 2:00 pm
Categories: ChipAgents AI, EDA

How Agentic AI Turns IC Engineers into Architects

There is an interesting article by Kexun ZHang of ChipAgents on their blogsite. This is a company to watch, absolutely.  Here is my take on it:

Software engineering has already demonstrated the trajectory of agentic AI. Coding tools progressed from autocomplete to systems that interpret requests, inspect repositories, modify… Read More

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Keysight ADS Enables First-Pass Silicon at 3 THz for AttoTude

Keysight ADS Enables First-Pass Silicon at 3 THz for AttoTude
by Daniel Nenni on 09-01-2026 at 10:00 am
Categories: EDA, Keysight EDA

Keysight ADS Enables First Pass Silicon at 3 THz for AttoTude

AttoTude has expanded its use of Keysight Technologies’ Advanced Design System (ADS) to support an integrated-circuit design flow spanning signaling frequencies from 100 GHz to 3 THz. The company reports that the resulting workflow has reduced IC development cycles by more than 50%, enabling projects to move from concept to… Read More

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Follow the Money – Agentrys Raises $24.5 Million to Build Agentic Design Automation

Follow the Money – Agentrys Raises $24.5 Million to Build Agentic Design Automation
by Mike Gianfagna on 09-01-2026 at 6:00 am
Categories: Agentrys, AI, EDA

Follow the Money – Agentrys Raises $24.5 Million to Build Agentic Design Automation

Agentrys recently launched a new category of design technology, Agentic Design Automation (ADA). The approach promises to revolutionize AI deployment for chip design with technology that facilitates the building of targeted agentic design flows that get better with every run. There is a lot of information available on the … Read More

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GenAlpha Brings a Practical Approach for Analog AI to DAC 2026

GenAlpha Brings a Practical Approach for Analog AI to DAC 2026
by Mike Gianfagna on 08-31-2026 at 10:00 am
Categories: AI, EDA, Events, GenAIpha

GenAlpha Booth

Agentic AI was everywhere at DAC 2026. Various focus areas were presented that covered many parts of the chip design flow. Verification and debug were a popular topic since so much time is spent there. Analog design is another pressure point. Every chip design has analog content. While the size of the analog blocks may not be huge,… Read More

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Exploiting agentic automation cost-effectively. Innovation in Verification

Exploiting agentic automation cost-effectively. Innovation in Verification
by Bernard Murphy on 08-31-2026 at 6:00 am
Categories: AI, Cadence, EDA

Innovation New

Frontier models (Claude, etc.) are very powerful but becoming expensive for high token counts. Methods to exploit a mix of models, including local open-weight models, are attracting attention. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer… Read More