Handel Jones has a new white-paper out titled Why Migration to FD-SOI is a Better Approach Than Bulk CMOS and FinFETs at 20nm and 14/16nm for Price-Sensitive Markets. Handel has done an in-depth analysis of the wafer and die costs of the various approaches, bulk planar (what we have been doing up to now), FD-SOI and FinFET. The analysis… Read More
Author: Paul McLellan
Triple Patterning
As you can’t have failed to notice by now, 28nm is the last process node that does not require double patterning. At 20nm and below, at least some layers require double patterning. The tightest spacing is typically not the transistors but the local interconnect and, sometimes, metal 1.
In the litho world they call double patterning… Read More
Atmel on Tour at AT&T Park
OK, it’s not exactly AT&T park…it’s the parking lot. But they have a huge semi loaded up with lots of cool Atmel stuff to show off some of the things that their customers are doing with their microcontrollers and display technology, primarily focused on the internet of things (IoT). I went down to check it … Read More
Mentor U2U Is On April 10th
If you are a Mentor user, U2U, the Mentor User group is coming up on April 10th. This is an all day event at the DoubleTree. The event is free. Registration starts at 8am and the agenda itself starts at 9am. There is a reception from 5-6pm in the evening.
There are three keynotes. At 9am: Wally Rhines, CEO of Mentor. The Big Squeeze. For … Read More
GSA Silicon Summit Is On April 10th
The annual GSA Silicon Summit is coming up in a few weeks. It is on April 10th at the Computer History Museum. Registration is at 9am and the meeting itself gets started at 9.45am. The summit finishes at 2.15pm. There are three sections during the day, and lunch is provided.
The first section is on Advancements in Nanoscale Manufacturing… Read More
Jasper at DVCon and EJUG
The Jasper European User Group meeting (EJUG) is coming up in a couple of weeks. It will be held in the Munich Hilton (which I have stayed in many times, the S-bahn from the airport pretty much stops in the basement) on April 2nd.
The schedule for the day is:
9:00 AM – Registration and continental breakfast
9:30 AM – Jasper… Read More
Cadence and ARM BFF
The biggest market for semiconductors is mobile and an ARM processor is the center of the axle around which it revolves. So everyone in the mobile ecosystem needs to work closely with ARM. At CDNLive earlier this week Cadence and ARM announced that they are deepening their partnership. Most of what they announced makes it a lot easier… Read More
Intelligent Sensors
Wearables are clearly one of the hot areas of the Internet of Things (IoT). A big part of that market is sensors of one sort or another. Andes low power microprocessors are a good fit for this market which requires both 32 bit performance and ultra low power. Performance is needed since IoT by definition has internet access in some way… Read More
EDAC Update: Elections, Kaufman and More
I wrote recently about the EDAC mixer in Mountain View. Due to college basketball there won’t be one in March, the next one will be in April. Details later in the month.
The EDA Consortium (EDAC) is seeking nominations for the Board of Directors for the two-year term beginning May 29, 2014. Voting member companies are entitled… Read More
Calypto: the View From the Top
At DVCon today I talked to Sanjiv Kaul, the CEO of Calypto. Just as a reminder, Calypto have 3 products, SLEC (sequential logical equivalence checking, also called sequential formal verification), PowerPro (sequential RTL level power reduction) and Catapult High Level Synthesis (that they took over from Mentor in 2011 in a complicated… Read More
Musk’s new job as Samsung Fab Manager – Can he disrupt chip making? Intel outside