Designing and Simulating Next Generation Data Centers and AI Factories

Designing and Simulating Next Generation Data Centers and AI Factories
by Kalar Rajendiran on 04-22-2025 at 10:00 am

Digital Twin and the AI Factory Lifecycle

At NVIDIA’s recent GTC conference, a Cadence-NVIDIA joint session provided insights into how AI-powered innovation is reshaping the future of data center infrastructure. Led by Kourosh Nemati, Senior Data Center Cooling and Infrastructure Engineer from NVIDIA and Sherman Ikemoto, Sales Development Group Director from … Read More


How Cadence is Building the Physical Infrastructure of the AI Era

How Cadence is Building the Physical Infrastructure of the AI Era
by Kalar Rajendiran on 04-21-2025 at 6:00 am

Phases of AI Adoption

At the 2025 NVIDIA GTC Conference, CEO Jensen Huang delivered a sweeping keynote that painted the future of computing in bold strokes: a world powered by AI factories, built on accelerated computing, and driven by agentic, embodied AI capable of interacting with the physical world. He introduced the concept of Physical AI—intelligence… Read More


Synopsys Executive Forum: Driving Silicon and Systems Engineering Innovation

Synopsys Executive Forum: Driving Silicon and Systems Engineering Innovation
by Kalar Rajendiran on 04-09-2025 at 10:00 am

Sassine Keynote (with Satya)

The annual SNUG (Synopsys Users Group) conference, now in its 35th year, once again brought together key stakeholders to showcase accomplishments, discuss challenges, and explore opportunities within the semiconductor and electronics industry. With approximately 2,500 attendees, SNUG 2025 served as a dynamic hub for collaboration… Read More


Evolution of Memory Test and Repair: From Silicon Design to AI-Driven Architectures

Evolution of Memory Test and Repair: From Silicon Design to AI-Driven Architectures
by Kalar Rajendiran on 04-01-2025 at 6:00 am

STAR Memory System (SMS) Solution

Memory testing in the early days of computing was a relatively straightforward process. Designers relied on simple, deterministic approaches to verify the functionality of memory modules. However, as memory density increased and systems became more complex, the likelihood of faults also rose. With advancements in memory… Read More


Ceva-XC21 and Ceva-XC23 DSPs: Advancing Wireless and Edge AI Processing

Ceva-XC21 and Ceva-XC23 DSPs: Advancing Wireless and Edge AI Processing
by Kalar Rajendiran on 03-25-2025 at 6:00 am

Cellular Evolution

Ceva recently unveiled its XC21 and XC23 DSP cores, designed to revolutionize wireless communications and edge AI processing. These new offerings build upon the Ceva-XC20 architecture, delivering unmatched efficiency, scalability, and performance for 5G-Advanced, pre-6G, and smart edge applications. As demand grows … Read More


Cut Defects, Not Yield: Outlier Detection with ML Precision

Cut Defects, Not Yield: Outlier Detection with ML Precision
by Kalar Rajendiran on 03-20-2025 at 10:00 am

Part Average Testing

How much perfectly good silicon is being discarded in the quest for reliability? During high-volume chip manufacturing, aggressive testing with strict thresholds may ensure quality but reduces yield, discarding marginal chips that could function flawlessly. On the other hand, prioritizing yield risks allowing defective… Read More


Cutting Through the Fog: Hype versus Reality in Emerging Technologies

Cutting Through the Fog: Hype versus Reality in Emerging Technologies
by Kalar Rajendiran on 03-14-2025 at 8:00 am

Collage of three images

Silicon Catalyst is an organization that supports early-stage semiconductor startups with an ecosystem that provides tools and resources needed to design, create, and market semiconductor solutions. It is the only incubator + accelerator focused on the Global Semiconductor Industry and operates with the motto “It’s about… Read More


Powering the Future: How Engineered Substrates and Material Innovation Drive the Semiconductor Revolution

Powering the Future: How Engineered Substrates and Material Innovation Drive the Semiconductor Revolution
by Kalar Rajendiran on 03-03-2025 at 6:00 am

Substrate Vision Summit Engineered Substrate Panel Session

Engineered substrate technology is driving an evolution within the semiconductor industry. As Moore’s Law reaches its limits, the focus is shifting from traditional planar wafer scaling to innovative material engineering and 3D integration. Companies like Soitec, Intel and Samsung are pioneering this transition, unlocking… Read More


Synopsys Expands Hardware-Assisted Verification Portfolio to Address Growing Chip Complexity

Synopsys Expands Hardware-Assisted Verification Portfolio to Address Growing Chip Complexity
by Kalar Rajendiran on 02-25-2025 at 6:00 am

Synopsys HAV Product Family

Last week, Synopsys announced an expansion of their Hardware-Assisted Verification (HAV) portfolio to accelerate semiconductor design innovations. These advancements are designed to meet the increasing demands of semiconductor complexity, enabling faster and more efficient verification across software and hardware… Read More


Soitec: Materializing Future Innovations in Semiconductors

Soitec: Materializing Future Innovations in Semiconductors
by Kalar Rajendiran on 02-20-2025 at 6:00 am

ESG in the DNA of Soitec

The semiconductor industry continues to evolve rapidly to meet the escalating demands for speed, power efficiency, and miniaturization. As traditional silicon-based technologies reach their physical and performance limits, engineered substrates and advanced material innovation have emerged as pivotal drivers of the… Read More