This news announced two weeks ago is not really good news for those expecting to see this new generation of computers, running Windows RT OS and no more based on x86 processor but on ARM CPU core, coming on the market. The reason invoked by Toshiba was “delays in getting adequate supplies of components” and, even if Toshiba did not specifically… Read More
Author: Eric Esteve
Arteris joins Inc. 500 List of America’s Fastest-Growing Private Companies… thanks to Arteris customers!
Arteris, founded in 2003, is the inventor and leading supplier of network-on-chip (NoC) interconnect IP solutions. Can we say that the company is still a start-up? I would say yes, as their flagship product, FlexNoc (Network on Chip IP function) was a completely new concept when it was introduced. As for every disruptive technology,… Read More
MemCon 2012: Cadence and Denali
I was very happy to see that Cadence has decided to hold MEMCON again in 2012, in Santa Clara on September 18[SUP]th[/SUP] . The session will start with “New Memory Technologies and Disruptions in the Ecosystem”from Martin Lund.
Martin is the recently (March this year) appointed Senior VP for the SoC Realization Group at cadence:… Read More
CEVA-MM3101 DSP IP core
If the CEVA-XC4000 DSP IP core offers support for the most demanding communication standards, the CEVA-MM3101 provides full control over embedded vision and image enhancement applications, in SW, allowing Application Processor chip makers and OEM a way to differentiate their product. CEVA has decided to launch the MM3101 … Read More
Arteris FlexNoC penetration increase… everywhere
The need for Network-on-Chip (NoC) has appeared at the time where chip makers realized that they could really integrate a complete system on a single die to build a System-on-Chip (SoC). At the early times (1995-2005), the so-call NoC IP suppliers were in fact proposing a crossbar switch, a pretty old concept initially developed… Read More
NVM IP: why only anti fuse solution from Novocell Semiconductor is 100% reliable?
The concept of Non Volatile Memory (NVM) block which could be integrated into an ASIC is relatively recent, Novocell for example has been created in 2001. NVM IP integration into an ASIC is a pretty smart technology: integrating from a few bytes to up to Mbits into a SoC can help reducing the number of chips in a system, increase security… Read More
Media Tablet Strategy from Google and Microsoft: illusion about the effective protection of NDAs…
Extracted from an interesting article from Jeff Orr from ABI research, “We have all heard about leaked company roadmaps that detail a vendor’s product or service plans for the next year or two. Typically, putting one’s plans down in advance of public announcement has two intended audiences: customers who rely on … Read More
Shorter, better and easier PCIe and NVM Express Verification flow with advanced technologies
We have talked about Cadence subsystem IP strategy, illustrated by NVM Express subsystem IP, in a previous blog. What we said was that “A subsystem IP based approach will also speed up the software development and validation phase: if the IP provider is able to propose the right tools, like the associated Verification IP (VIP), … Read More
CEVA-XC4000 new DSP IP core
The CEVA-XC4000 offers unparalleled, scalable performance capabilities and innovative power management to address the most demanding communication standards, including LTE-Advanced, 802.11ac and DVB-T2, on a single architecture. Building upon its highly successful predecessors, the CEVA-XC4000 architecture sets… Read More
NVM IP: Novocell Semiconductor has announced an expansion of their product line
Novocell Semiconductor, core antifuse-based OTP Smartbit™ technology was first patented in 2001 and 2002, and created a solid foundation for the first ten years,” stated Walt Novosel, President and CTO, “Since then, our customer-driven focus has led to numerous innovations in our original high reliability Smartbit-based… Read More
More Headwinds – CHIPS Act Chop? – Chip Equip Re-Shore? Orders Canceled & Fab Delay